[PATCH] D144166: [RISCV] For rv32, accept constants like 0xfffff800 as a valid simm12.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:772
+    return IsConstantImm &&
+           isInt<5>(fixImmediateForRV32(Imm, isRV64Imm()) - 1) &&
            VK == RISCVMCExpr::VK_RISCV_None;
----------------
reames wrote:
> Is this checking the right thing?  It seems like maybe we want to allow the 32 bit form on the Imm -1, not the Imm.  Main case I'm thinking of is what if imm is smin<5> and thus smin<5>-1 is not an int<5>.  
> 
> Alternatively said, please check what gcc does and make sure our behavior matches in the edge case.  
I think it's right. `Imm` is the value written by the user. If I sign extend after subtracting 1 we will accept 0x100000000 the same as if the user had written 0. Because 0x100000000 will be decremented to 0xffffffff which will sign extend to 0xffffffffffffffff. We also get 0xffffffffffffffff from subtracting 1 from 0.

The valid input values should be the ranges [-15, 16] and [0xfffffff1, 0xffffffff].


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  https://reviews.llvm.org/D144166/new/

https://reviews.llvm.org/D144166