[llvm] 6bec2c3 - [InstCombine] Add additional aggregate reconstruction test (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 16 00:48:30 PST 2023
Author: Nikita Popov
Date: 2023-02-16T09:47:44+01:00
New Revision: 6bec2c30777fe1f6192417c5c4e8881ffca0d090
URL: https://github.com/llvm/llvm-project/commit/6bec2c30777fe1f6192417c5c4e8881ffca0d090
DIFF: https://github.com/llvm/llvm-project/commit/6bec2c30777fe1f6192417c5c4e8881ffca0d090.diff
LOG: [InstCombine] Add additional aggregate reconstruction test (NFC)
This is like test2 from the same file, but using poison instead of
undef as base, which matches the IR we use nowadays.
Added:
Modified:
llvm/test/Transforms/InstCombine/aggregate-reconstruction.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/aggregate-reconstruction.ll b/llvm/test/Transforms/InstCombine/aggregate-reconstruction.ll
index f599b75853af5..af11aac361bc8 100644
--- a/llvm/test/Transforms/InstCombine/aggregate-reconstruction.ll
+++ b/llvm/test/Transforms/InstCombine/aggregate-reconstruction.ll
@@ -301,3 +301,23 @@ end:
%i3 = insertvalue { i32, i32 } %i2, i32 %i1, 1
ret { i32, i32 } %i3
}
+
+; Like test2 but with a poison base.
+define [3 x i32] @poison_base([3 x i32] %srcagg) {
+; CHECK-LABEL: @poison_base(
+; CHECK-NEXT: [[I0:%.*]] = extractvalue [3 x i32] [[SRCAGG:%.*]], 0
+; CHECK-NEXT: [[I1:%.*]] = extractvalue [3 x i32] [[SRCAGG]], 1
+; CHECK-NEXT: [[I2:%.*]] = extractvalue [3 x i32] [[SRCAGG]], 2
+; CHECK-NEXT: [[I3:%.*]] = insertvalue [3 x i32] poison, i32 [[I0]], 0
+; CHECK-NEXT: [[I4:%.*]] = insertvalue [3 x i32] [[I3]], i32 [[I1]], 1
+; CHECK-NEXT: [[I5:%.*]] = insertvalue [3 x i32] [[I4]], i32 [[I2]], 2
+; CHECK-NEXT: ret [3 x i32] [[I5]]
+;
+ %i0 = extractvalue [3 x i32] %srcagg, 0
+ %i1 = extractvalue [3 x i32] %srcagg, 1
+ %i2 = extractvalue [3 x i32] %srcagg, 2
+ %i3 = insertvalue [3 x i32] poison, i32 %i0, 0
+ %i4 = insertvalue [3 x i32] %i3, i32 %i1, 1
+ %i5 = insertvalue [3 x i32] %i4, i32 %i2, 2
+ ret [3 x i32] %i5
+}
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