[llvm] 639b786 - [RISCV] Use llvm::rotl (NFC)

[Kazu Hirata via llvm-commits]

Author: Kazu Hirata
Date: 2023-02-13T20:16:48-08:00
New Revision: 639b7865a67f886ca9d7b994d577236a6957734c

URL: https://github.com/llvm/llvm-project/commit/639b7865a67f886ca9d7b994d577236a6957734c
DIFF: https://github.com/llvm/llvm-project/commit/639b7865a67f886ca9d7b994d577236a6957734c.diff

LOG: [RISCV] Use llvm::rotl (NFC)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
index 57908723530de..f4e227cc6c554 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
@@ -358,8 +358,7 @@ InstSeq generateInstSeq(int64_t Val, const FeatureBitset &ActiveFeatures) {
                          ActiveFeatures[RISCV::FeatureVendorXTHeadBb])) {
     if (unsigned Rotate = extractRotateInfo(Val)) {
       RISCVMatInt::InstSeq TmpSeq;
-      uint64_t NegImm12 =
-          ((uint64_t)Val >> (64 - Rotate)) | ((uint64_t)Val << Rotate);
+      uint64_t NegImm12 = llvm::rotl<uint64_t>(Val, Rotate);
       assert(isInt<12>(NegImm12));
       TmpSeq.emplace_back(RISCV::ADDI, NegImm12);
       TmpSeq.emplace_back(ActiveFeatures[RISCV::FeatureStdExtZbb]