The Week Of Monday 14 November 2022 Archives by thread
Starting: Mon Nov 14 00:04:11 PST 2022
Ending: Sun Nov 20 23:51:13 PST 2022
Messages: 2386
- [PATCH] D137822: [IRCE] Bail out if Start AddRec is for another loop
Dmitry Makogon via Phabricator via llvm-commits
- [llvm] 10ab29e - [IRCE] Bail out if AddRec in icmp is for another loop (PR58912)
Dmitry Makogon via llvm-commits
- [PATCH] D137532: [LoongArch] Implement the TargetLowering::getRegisterByName hook
WÁNG Xuěruì via Phabricator via llvm-commits
- [llvm] 285da1c - [llvm] Use std::is_integral_v (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D137925: [AArch64] FNMUL
Sjoerd Meijer via Phabricator via llvm-commits
- [PATCH] D137903: [llvm] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
James Henderson via Phabricator via llvm-commits
- [PATCH] D137704: [RISCV] Make lowerVECTOR_SHUFFLEAsVNSRL support more vnsrl shuffle pattern.
Han-Kuan Chen via Phabricator via llvm-commits
- [PATCH] D128631: [AArch64] Initial sched model for Neoverse N2
Cullen Rhodes via Phabricator via llvm-commits
- [PATCH] D137824: [WebAssembly] multivalue stackify fix
Sam Parker via Phabricator via llvm-commits
- [PATCH] D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D137866: [Coroutines] Do not add allocas for retcon coroutines
Jannik Silvanus via Phabricator via llvm-commits
- [PATCH] D137926: [Utils] Improved chunk-print-before-all.py script
Dmitry Bakunevich via Phabricator via llvm-commits
- [llvm] 30982a5 - [ConstraintElimination] Make decompose() infallible
Nikita Popov via llvm-commits
- [PATCH] D137847: [ConstraintElimination] Make decompose() infallible
Nikita Popov via Phabricator via llvm-commits
- [llvm] e82b5b5 - [ConstraintElimination] Add Decomposition struct (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D137848: [ConstraintElimination] Add Decomposition class (NFCI)
Nikita Popov via Phabricator via llvm-commits
- [llvm] 0387679 - [Coroutines] Presubmit retcon without suspend test
Sebastian Neubauer via llvm-commits
- [llvm] ce879a0 - [Coroutines] Do not add allocas for retcon coroutines
Sebastian Neubauer via llvm-commits
- [PATCH] D126455: [FuncSpec] Make the Function Specializer part of the IPSCCP pass.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline via Phabricator via llvm-commits
- [llvm] feda983 - [TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D137641: [TableGen] Use MemoryEffects to represent intrinsic memory effects (NFCI)
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137433: [AArch64][CodeGen] Remove redundant vector negations before concat
Peter Waller via Phabricator via llvm-commits
- [PATCH] D136164: [MemorySSA] Use BatchAA for clobber walker
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137768: [opt][clang] Enable using -module-summary with -S / -emit-llvm
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137700: [reg2mem]Skip non-sized Instructions
Nikita Popov via Phabricator via llvm-commits
- [llvm] 42d9261 - [ConstraintElimination] Use SmallVectorImpl (NFC)
Nikita Popov via llvm-commits
- [PATCH] D137840: [ConstraintElimination] Dummy revision for review
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137758: [HardwareLoops] remove loops which has undef count
Sam Parker via Phabricator via llvm-commits
- [llvm] 7e4cfcd - [gn build] Port dd46a08008f7
LLVM GN Syncbot via llvm-commits
- [PATCH] D107639: [AMDGPU][GISel] Smaller code for scalar 32 to 64-bit extensions
Jay Foad via Phabricator via llvm-commits
- [PATCH] D119547: [libc][bazel] Add tests to the bazel build
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D137928: [VP][RISCV] Add vp.bswap and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule
Suyog Sarda via Phabricator via llvm-commits
- [llvm] 8ad88f1 - Do not write a comma when varargs is the only argument
Adrian Vogelsgesang via llvm-commits
- [PATCH] D137893: [AsmWriter] Do not write a comma when varargs is the only argument
Adrian Vogelsgesang via Phabricator via llvm-commits
- [PATCH] D137715: [AArch64][SVE] Add more ptest removal tests
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D137924: [TargetParser] Split AArch64TargetParser from ARMTargetParser
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137716: [AArch64][SVE] Fix bad PTEST(PG, OP(PG, ...)) optimization
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D137930: [AArch64][SVE] Add PTEST_ANY pseudo instruction
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D137717: [AArch64][SVE] Fix bad PTEST(X, X) optimization
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D137718: [AArch64][SVE] Fix bad PTEST(PTRUE_ALL, PTEST_LIKE) optimization
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D137931: [RISCV] Don't use zero-stride vector load for gather if not optimized
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D137422: [DAGCombine] Generalize foldSelectCCToShiftAnd
Mikhail Gudim via Phabricator via llvm-commits
- [PATCH] D137932: [GlobalIsel][AMDGPU] Changing legalize rule for G_{UADDO|UADDE|USUBO|USUBE|SADDE|SSUBE}
Yashwant Singh via Phabricator via llvm-commits
- [llvm] 200f341 - [reg2mem] Skip non-sized Instructions (PR58890)
Nikita Popov via llvm-commits
- [PATCH] D137821: [LoongArch] Handle register spill in BranchRelaxation pass
wanglei via Phabricator via llvm-commits
- [PATCH] D137933: [llvm-debuginfo-analyzer] 10 - Smart Pointers
Carlos Alberto Enciso via Phabricator via llvm-commits
- [llvm] 034df6f - [InstCombine][NFC] Add extractelement tests
Thomas Symalla via llvm-commits
- [llvm] eb05da5 - [AMDGPU] Simplify SelectPat and remove comment obsoleted by D133593
Jay Foad via llvm-commits
- [PATCH] D137892: [AMDGPU] Remove the assertion for MUBUF instruction with voffset
Christudasan Devadasan via Phabricator via llvm-commits
- [PATCH] D137934: [InstCombine] Fold extractelt with select of constants
Thomas Symalla via Phabricator via llvm-commits
- [PATCH] D125778: [llvm-debuginfo-analyzer] 03 - Logical elements
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D125783: [llvm-debuginfo-analyzer] 08 - ELF Reader
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D137851: [OPENMP]Initial support for at clause
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D137913: [X86] Rewrite `getScalarizationOverhead()`
Simon Pilgrim via Phabricator via llvm-commits
- [lld] ca875cb - [ThinLTO] a ThinLTO warning is added if cache_size_bytes or cache_size_files is too small for the current link job. The warning recommends the user to consider adjusting --thinlto-cache-policy.
Ying Yi via llvm-commits
- [PATCH] D135590: [ThinLTO][ELF] Add a ThinLTO warning if cache_size_bytes or cache_size_files is too small for the current link job.
Ying Yi via Phabricator via llvm-commits
- [PATCH] D137066: [AMDGPU] Add amdgcn_s_buffer_load_imm intrinsic
Piotr Sobczak via Phabricator via llvm-commits
- [PATCH] D137917: [cmake] Fix _GNU_SOURCE being added unconditionally
Trass3r via Phabricator via llvm-commits
- [PATCH] D137936: [AArch64] Optimize cmp chain when the result is tested for [in]equality with 0
Allen zhong via Phabricator via llvm-commits
- [PATCH] D137909: [Support] Allow complex names for annotation points and ranges via $()
Sam McCall via Phabricator via llvm-commits
- [PATCH] D137916: [cmake] Disable RTTI by default for tests
Trass3r via Phabricator via llvm-commits
- [PATCH] D97897: [MSan][RISCV] Add RISCV64 support for MSan
Alex Fan via Phabricator via llvm-commits
- [PATCH] D137920: [nfc] Mark classes final as reported by -Wsuggest-final-types
Trass3r via Phabricator via llvm-commits
- [llvm] ef6f3c7 - [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax
Dmitry Preobrazhensky via llvm-commits
- [PATCH] D137842: [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137937: [TableGen] Represent IntrHasSideEffects using inaccessiblemem read+write
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D137844: [DAG] Fold zext/sext into masked loads with multiple truncate uses
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D135447: [AMDGPU] Add llvm.is.fpclass intrinsic to existing SelectionDAG fp class support and introduce GlobalISel implementation for AMDGPU
Janek van Oirschot via Phabricator via llvm-commits
- [PATCH] D137918: [nfc] move expensive parts of Hashing.h into cpp file
Trass3r via Phabricator via llvm-commits
- [PATCH] D114174: [ARM][CodeGen] Add support for complex deinterleaving
Dave Green via Phabricator via llvm-commits
- [PATCH] D137844: [DAG] Allow folding zext/sext into masked loads with multiple uses
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D137616: [BOLT][NFC] Fix possible use-after-free
Phabricator via llvm-commits
- [PATCH] D137939: [CGObjC] Open cleanup scope before SaveAndRestore CurrentFuncletPad and push CatchRetScope early
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D137940: [RISCV] Enable reduction pattern SelectICmp and SelectFCmp.
Mel Chen via Phabricator via llvm-commits
- [PATCH] D137381: [clang][compiler-rt] Exception escape out of an non-unwinding function is an undefined behaviour
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137720: Migrate getOrCreateInternalVariable from Clang to OMPIRBuilder.
Akash Banerjee via Phabricator via llvm-commits
- [llvm] d52e283 - [ARM][CodeGen] Add support for complex deinterleaving
Nicholas Guy via llvm-commits
- [llvm] c83c69d - [gn build] Port d52e2839f3b1
LLVM GN Syncbot via llvm-commits
- [llvm] 47eddbb - [LoopVersioningLICM] Remove unnecessary reset code (NFC)
Nikita Popov via llvm-commits
- [PATCH] D137688: [CodeGen] Refactor visitSCALAR_TO_VECTOR. NFC.
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D136068: [VPlan] Update VPValue::getDef to return VPRecipeBase* (NFC).
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D133758: [VPlan] Add VPDerivedIVRecipe, use for VPScalarIVStepsRecipe.
Florian Hahn via Phabricator via llvm-commits
- [llvm] 6d98f3a - [LoopVersioningLICM] Clarify scope of AST (NFC)
Nikita Popov via llvm-commits
- [llvm] cc5f93b - [AArch64] Add match patterns for the reassociated forms of FNMUL
Sjoerd Meijer via llvm-commits
- [PATCH] D137944: [ObjC][ARC] Teach the OptimizeSequences step of ObjCARCOpts about WinEH funclet tokens
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D129066: [AArch64][CodeGen] Add AArch64 support for complex deinterleaving
Dave Green via Phabricator via llvm-commits
- [llvm] 458ae53 - [AST] Remove legacy AliasSetPrinter pass
Nikita Popov via llvm-commits
- [PATCH] D137620: [BOLT] Don't align .text to pageAlign
Denis Revunov via Phabricator via llvm-commits
- [PATCH] D137945: [ObjC][ARC] Share bundle handling code between steps of the ObjCARCOpts pass and cleanup (NFC)
Stefan Gränitz via Phabricator via llvm-commits
- [llvm] 3eacda4 - [AArch64] Add all SME2.1 instructions Assembly/Disassembly
Caroline Concatto via llvm-commits
- [PATCH] D137946: [X86] Allow no X87 on 32-bit
Phoebe Wang via Phabricator via llvm-commits
- [llvm] 814267e - [X86] Remove unnecessary overrides for CBW/CWDE/CDQE/CMC instructions
Simon Pilgrim via llvm-commits
- [llvm] ae4718a - [AMDGPU] Define and use UniformTernaryFrag. NFC.
Jay Foad via llvm-commits
- [PATCH] D137947: [AArch64][SVE] Add instcombine to convert ptest.last/first to ptest.any
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for select (x < 0), TrueConstant, FalseConstant)
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D137950: [AMDGPU][MC][NFC] Rename VOP3 VOPC test files
Joe Nash via Phabricator via llvm-commits
- [llvm] 9d78bbe - [docs][OpaquePtr] Fix hyperlinks
Mindong Chen via llvm-commits
- [PATCH] D137952: [AMDGPU][GFX11] Refactor VOPD operands handling
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D137768: [opt][clang] Enable using -module-summary /-flto=thin with -S / -emit-llvm
Teresa Johnson via Phabricator via llvm-commits
- [llvm] 1b560e6 - [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via llvm-commits
- [PATCH] D137783: [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] b71bf08 - [AA] Move MayBeCrossIteration into AAQI (NFC)
Nikita Popov via llvm-commits
- [llvm] f6670a3 - [AMDGPU] More use of DivergentBinFrag and friends. NFC.
Jay Foad via llvm-commits
- [PATCH] D137954: Enable roundeven.
Leon Clark via Phabricator via llvm-commits
- [PATCH] D133116: [AArch64][SVE] Optimise repeated floating-point complex patterns to splat
Paul Walker via Phabricator via llvm-commits
- [llvm] 62b00bf - [NFC] Removal of complex deinterleaving test case complex_mul_v8f64
Nicholas Guy via llvm-commits
- [PATCH] D137955: [AST] Make AliasSetTracker work on BatchAA
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D129067: [CodeGen] Complex deinterleaving vector splitting
Nicholas Guy via Phabricator via llvm-commits
- [PATCH] D137832: [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via Phabricator via llvm-commits
- [llvm] d55594b - [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores.
Ivan Kosarev via llvm-commits
- [PATCH] D121929: [AArch64] Mark all instructions that read/write FPCR as doing so
John Brawn via Phabricator via llvm-commits
- [llvm] 6111125 - [NFC] Fixing spelling in code comment
Chris Bieneman via llvm-commits
- [llvm] d7208b0 - [MCA][X86] Add test coverage for VBMI2 instructions
Simon Pilgrim via llvm-commits
- [llvm] 7e78685 - [MCA][X86] Ensure the avx512 vnni tests use the upper xmm/ymm registers
Simon Pilgrim via llvm-commits
- [lld] df2f9e5 - [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via llvm-commits
- [PATCH] D137723: [PDB] Don't include input files in the 'cmd' entry of S_ENVBLOCK
Sylvain Audi via Phabricator via llvm-commits
- [PATCH] D137044: [ClangFE] Add support for option -mno-pic-data-is-text-relative
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D137958: [LAA] Use cross-iteration alias analysis
Nikita Popov via Phabricator via llvm-commits
- [llvm] 780c539 - [RISCV] Implement assembler support for XVentanaCondOps
Philip Reames via llvm-commits
- [PATCH] D137350: [RISCV] Implement assembler support for XVentanaCondOps
Philip Reames via Phabricator via llvm-commits
- [llvm] cd7ff07 - [SystemZ] improve test for showing store merge miscompile; NFC
Sanjay Patel via llvm-commits
- [llvm] 0a37290 - [InstSimplify] restrict logic fold with partial undef vector
Sanjay Patel via llvm-commits
- [PATCH] D124823: [OpenMPIRBuilder] Introduce OMPRegionInfo managing the stack of OpenMP region constructs.
Michael Kruse via Phabricator via llvm-commits
- [llvm] 87f652d - Migrate getOrCreateInternalVariable from Clang to OMPIRBuilder.
Akash Banerjee via llvm-commits
- [llvm] 7ec05fe - [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Arthur Eubanks via llvm-commits
- [PATCH] D137915: [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137902: [M68k][MC] Make immediate operands relocatable
Min-Yih Hsu via Phabricator via llvm-commits
- [llvm] d7c1427 - Revert "[LegacyPM] Remove cl::opts controlling optimization pass manager passes"
Arthur Eubanks via llvm-commits
- [PATCH] D137959: [dsymutil] Fix crash in the Reproducer/FileCollector when TMPDIR is empty
Jonas Devlieghere via Phabricator via llvm-commits
- [llvm] 13e32a8 - [RISCV] Improve use of PACK instruction on rv64.
Craig Topper via llvm-commits
- [llvm] 637ed52 - [RISCV] Remove old test case. NFC
Craig Topper via llvm-commits
- [llvm] cbcf123 - [LegacyPM] Remove cl::opts controlling optimization pass manager passes
Arthur Eubanks via llvm-commits
- [PATCH] D137961: [bazel] Fix Bufferization dialect build
Chenguang Wang via Phabricator via llvm-commits
- [llvm] 22339e5 - [Support] Use thread safe version of getpwuid and getpwnam.
Pirama Arumuga Nainar via llvm-commits
- [PATCH] D137864: [Support] Use thread safe version of getpwuid and getpwnam.
Pirama Arumuga Nainar via Phabricator via llvm-commits
- [PATCH] D135736: [mlir][MemRef] Make reinterpret_cast(extract_strided_metadata) more robust
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D137963: DAG: Fix assert on load casted to vector with attached range metadata
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137423: [PowerPC] make expensive mflr be away from its user in the function prologue
Roland Froese via Phabricator via llvm-commits
- [llvm] 1c9a93a - [GlobalIsel][AMDGPU] Changing legalize rule for G_{UADDO|UADDE|USUBO|USUBE|SADDE|SSUBE}
Yashwant Singh via llvm-commits
- [PATCH] D137966: [AArch64] Lower fixed-length vector_shuffle to SVE splat if possible
Benjamin Maxwell via Phabricator via llvm-commits
- [PATCH] D136201: [InstCombine] Handle PHI nodes when eliminating constant memcpy
Anshil Gandhi via Phabricator via llvm-commits
- [PATCH] D137574: PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander via Phabricator via llvm-commits
- [llvm] 18278d8 - [RISCV] Move FixableDef handling out of isSignExtendingOpW.
Craig Topper via llvm-commits
- [llvm] 38f47d9 - [AMDGPU][MC][NFC] Rename VOP3 VOPC test files
Joe Nash via llvm-commits
- [llvm] 63571e8 - [RISCV] Add scalar FP compares to isSignExtendingOpW in RISCVSExtWRemoval.
Craig Topper via llvm-commits
- [llvm] 4295f8c - [lto] Update function name in comment after 5f312ad45
Nico Weber via llvm-commits
- [PATCH] D135837: [mlir][MemRef] Simplify extract_strided_metadata(reinterpret_cast)
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D135839: [mlir][MemRef] Change the anchor point of a subview pattern
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D137815: [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via Phabricator via llvm-commits
- [PATCH] D133036: [InstCombine] Treat passing undef to noundef params as UB
Arthur Eubanks via Phabricator via llvm-commits
- [PATCH] D137969: [AMDGPU][MC][GFX11] Correct op_sel handling for permlane*16
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [PATCH] D136386: [mlir][MemRef] Change the anchor point of a reshapeLikeOp pattern
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D137970: [RISCV] Transform fixable instruction in place in RISCVSExtWRemoval. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137971: [COFF, Mach-O] Include -mllvm options in thinlto cache key
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137461: [LoopInterchange] Refactor and rewrite validDepInterchange()
MengXuan Cai via Phabricator via llvm-commits
- [PATCH] D137813: [RegAlloc Greedy]Account statepoints while splitting single basic block
Quentin Colombet via Phabricator via llvm-commits
- [llvm] 11e8686 - [MachineCSE] Allow CSE for instructions with ignorable operands
Guozhi Wei via llvm-commits
- [PATCH] D137222: [MachineCSE] Allow CSE for instructions with ignorable operands
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D137217: [LTO][COFF] Use bitcode file names in lto native object file names.
Zequan Wu via Phabricator via llvm-commits
- [PATCH] D124195: [AMDGPU] Separate out SGPR spills to VGPR lanes during PEI
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D124490: [InstrProf] Minimal Block Coverage
Ellis Hoag via Phabricator via llvm-commits
- [PATCH] D137771: [lit] [Windows] Print exit codes > 255 as hex too
Reid Kleckner via Phabricator via llvm-commits
- [lld] 67d311a - [COFF, Mach-O] Include -mllvm options in thinlto cache key
Nico Weber via llvm-commits
- [PATCH] D137811: InstCombine: Port amdgcn.class intrinsic combines to is.fpclass
Joshua Cranmer via Phabricator via llvm-commits
- [llvm] 8da41fe - [cmake] Fix _GNU_SOURCE being added unconditionally
Tom Stellard via llvm-commits
- [PATCH] D137882: [DWARFLibrary] Add support to re-construct cu-index
Alexander Yermolovich via Phabricator via llvm-commits
- [llvm] 68efb47 - [dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty
Jonas Devlieghere via llvm-commits
- [PATCH] D137976: GlobalISel: Add debug print for applied rule in generated combiner
Matt Arsenault via Phabricator via llvm-commits
- [llvm] ad68c66 - [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Xiang Li via llvm-commits
- [PATCH] D137977: [libc] Forward LLVM_LIBC options when using a runtimes build
Joseph Huber via Phabricator via llvm-commits
- [llvm] fd824bd - Revert "[dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty"
Jonas Devlieghere via llvm-commits
- [PATCH] D137398: lib/CodeGen: Compile with -fvisibility=hidden when possible
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Serge Pavlov via llvm-commits
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- [PATCH] D136617: [opt] Print deprecation warning for use of legacy syntax with new pass manager
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- [llvm] 70dc3b8 - [AggressiveInstCombine] Remove legacy PM pass
Arthur Eubanks via llvm-commits
- [PATCH] D137116: [AggressiveInstCombine] Remove legacy PM pass
Arthur Eubanks via Phabricator via llvm-commits
- [llvm] f387918 - [TargetLowering][RISCV][ARM][AArch64][Mips] Reduce the number of AND mask constants used by BSWAP expansion.
Craig Topper via llvm-commits
- [PATCH] D138065: [ELF] Handle GCC collect2 -plugin-opt= on Windows
Brett Werling via Phabricator via llvm-commits
- [PATCH] D138066: [BOLT-TESTS] Follow-up to D131919
Amir Ayupov via Phabricator via llvm-commits
- [llvm] b7d9310 - [gn build] Port 4be39288f506
LLVM GN Syncbot via llvm-commits
- [llvm] 8d0b2f0 - [gn build] Port a16bd4f9f25e
LLVM GN Syncbot via llvm-commits
- [PATCH] D138067: GlobalISel: Try to fold G_SEXT_INREG to G_AND with mask
Matt Arsenault via Phabricator via llvm-commits
- [llvm] c0ef83e - [LSR] Check if terminating value is safe to expand before transformation
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- [PATCH] D137905: [GlobalISel] Add new G_INVOKE_REGION_START/END instructions to fix an EH bug
Jessica Paquette via Phabricator via llvm-commits
- [PATCH] D32198: [TySan] A Type Sanitizer (LLVM)
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D138072: [llvm-reduce] Do not crash when accessing landingpads of invokes.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Delete dead MemoryUseOrDef for CallInst when clone loop basicblock
Alina Sbirlea via Phabricator via llvm-commits
- [PATCH] D137873: [LLDB][Minidump] Set abi environment for windows.
Zequan Wu via Phabricator via llvm-commits
- [PATCH] D138078: [CodeGenPrepare] split critical indirect edges from callbr w/ outputs
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D138080: [LangRef] remove callbr references from Addresses of BasicBlock section
Nick Desaulniers via Phabricator via llvm-commits
- [PATCH] D47702: DAG: ComputeNumSignBits from load range metadata
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138081: [IR] Split out IR printing passes into IRPrinter
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D137439: [RISCV] Remove some unneeded widening FP vector pseudo instructions. NFC
Craig Topper via Phabricator via llvm-commits
- [PATCH] D138082: GlobalISel: ComputeNumSignBits from load range metadata
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138083: AutoUpgrade: Fix assertion on invalid name mangling usage
Matt Arsenault via Phabricator via llvm-commits
- [llvm] b88b830 - [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Michael Maitland via llvm-commits
- [llvm] e8e92c8 - Revert "[RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV"
Michael Maitland via llvm-commits
- [llvm] 5d19fea - [PowerPC] Fix strict load-conversion recognition
Qiu Chaofan via llvm-commits
- [llvm] aa47bfa - [RISCV] Refactor getDefaultVLOps. NFC.
Han-Kuan Chen via llvm-commits
- [PATCH] D137785: [PowerPC][GISel] Add initial GlobalISel support for vector functions.
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 85d3a41 - [RISCV] Remove some unneeded widening FP vector pseudo instructions. NFC
Craig Topper via llvm-commits
- [PATCH] D138084: [LoongArch] Support when the depth of __builtin_frame_address is greater than zero
Gong LingQin via Phabricator via llvm-commits
- [llvm] a214c52 - [RISCV] Don't use zero-stride vector load for gather if not optimized
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- [PATCH] D137427: [RISCV][Codegen] Account for LMUL in Vector Mask instructions
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137426: [RISCV][Codegen] Account for LMUL in Vector floating-point instructions
Craig Topper via Phabricator via llvm-commits
- [llvm] 7d59b33 - [X86][AMX] Fix the shape dependency issue.
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- [llvm] 8ef1cc9 - [RISCV] Improve formatting of Sched lists in tablegen. NFC
Craig Topper via llvm-commits
- [llvm] 5c3ca10 - [VP][RISCV] Add vp.bswap and RISC-V support.
Yeting Kuo via llvm-commits
- [llvm] 0cc8752 - Revert "[pgo] Avoid introducing relocations by using private alias"
Paul Kirth via llvm-commits
- [PATCH] D138086: [LoongArch] AsmParser support for the li.[wd] pseudo instructions
wanglei via Phabricator via llvm-commits
- [PATCH] D116705: [lld-macho] Increase slops to prevent thunk out of range
Mike Hommey via Phabricator via llvm-commits
- [PATCH] D138087: GlobalISel: Fold some idempotent operations
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137685: [VP][RISCV] Add vp.nearbyint and RISC-V support.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D137430: [RISCV][CodeGen] Kill dead pseudo classes and replace with specific LMUL versions. NFC
Craig Topper via Phabricator via llvm-commits
- [llvm] 409eaff - [AArch64InstPrinter] Print TargetAddress as an uint64_t
Woody Lin via llvm-commits
- [PATCH] D137260: [AArch64InstPrinter] Print TargetAddress as an uint64_t
Phabricator via llvm-commits
- [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain
Kai Luo via Phabricator via llvm-commits
- [llvm] ed9638c - [VP][RISCV] Add vp.nearbyint and RISC-V support.
Yeting Kuo via llvm-commits
- [PATCH] D138092: [llvm-debuginfo-analyzer] Return by reference instead of value - Warning analysis data.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [llvm] e611d41 - [gn build] Port 617277e7cbda
LLVM GN Syncbot via llvm-commits
- [PATCH] D137483: [NFC][PowerPC] Add NFC fixes to PPCInstrinfo.cpp when getting the defined machine instruction.
Amy Kwan via Phabricator via llvm-commits
- [llvm] a85b712 - IR: Make arithmetic_fence a DefaultAttrs intrinsic
Matt Arsenault via llvm-commits
- [llvm] fde4ef1 - InstSimplify: Fold arithmetic_fence as idempotent
Matt Arsenault via llvm-commits
- [llvm] 1f67dc8 - [Driver] Enable nested configuration files
Serge Pavlov via llvm-commits
- [PATCH] D138093: [Inline Spiller] Extend the snippet by statepoint uses
Serguei Katkov via Phabricator via llvm-commits
- [llvm] 349b6af - [AMDGPU] Remove the assertion for MUBUF instruction with voffset
Christudasan Devadasan via llvm-commits
- [llvm] ddbb21b - [LoongArch] Add immediate operand validity check for __builtin_loongarch_dbar
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- [PATCH] D69496: Attributor: Move list of opcodes
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138094: [LoongArch] Add intrinsics for ibar, break and syscall
Gong LingQin via Phabricator via llvm-commits
- [llvm] 342642d - [AMDGPU][GISel] Smaller code for scalar 32 to 64-bit extensions
Jay Foad via llvm-commits
- [PATCH] D138095: [asan] Keep Itanium mangled names in global metadata
Fangrui Song via Phabricator via llvm-commits
- [llvm] 116c894 - DAG: Fix assert on load casted to vector with attached range metadata
Matt Arsenault via llvm-commits
- [llvm] 4787a48 - AMDGPU/GlobalISel: Fix shift tests using out of bounds offsets
Matt Arsenault via llvm-commits
- [PATCH] D136809: [CMake] Ensure `CLANG_RESOURCE_DIR` is respected
LJC via Phabricator via llvm-commits
- [llvm] b18cdea - [MC][LoongArch] Fix needsRelocateWithSymbol() implementation
Weining Lu via llvm-commits
- [PATCH] D137384: [MC][LoongArch] Fix needsRelocateWithSymbol() implementation
Lu Weining via Phabricator via llvm-commits
- [PATCH] D138097: [BOLT][AArch64] Handle adrp+ld64 linker relaxations
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D138099: [BOLT][runtime] Change fPIE flag to fPIC
Vladislav Khmelevsky via Phabricator via llvm-commits
- [PATCH] D138100: [LoongArch] Implement assembler branches pseudo instructions
wanglei via Phabricator via llvm-commits
- [PATCH] D138101: [RISCV] Lower unmasked zero-stride vector load to (scalar load + splat)
Wang Pengcheng via Phabricator via llvm-commits
- [PATCH] D133321: [Assignment Tracking][24/*] Always RemoveRedundantDbgInstrs in instcombine in assignment tracking builds
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
James Henderson via Phabricator via llvm-commits
- [PATCH] D138104: [AMDGPU] Precommit add_shr_carry test
Pierre van Houtryve via Phabricator via llvm-commits
- [PATCH] D138105: [PowerPC] Support test data class intrinsic of 128-bit float
Qiu Chaofan via Phabricator via llvm-commits
- [llvm] b303c00 - [WebAssembly] multivalue stackify fix
Samuel Parker via llvm-commits
- [PATCH] D135957: [AArch64][SeperateConstOffsetFromGEP] Prevent pass from splitting GEP if an index has more than one use
Zain Jaffal via Phabricator via llvm-commits
- [PATCH] D137734: [SME] Store buffer to the correct pointer when setting up lazy-save.
David Sherwood via Phabricator via llvm-commits
- [PATCH] D138106: [AMDGPU][GISel] Add lshr/add -> uaddo combine
Pierre van Houtryve via Phabricator via llvm-commits
- [llvm] 9792744 - [NFC][SelectionDAG][DebugInfo] Remove duplicate parameter from handleDebugValue
via llvm-commits
- [llvm] a1ac6ef - [NFC][SelectionDAG][DebugInfo] Refactor DanglingDebugInfo class
via llvm-commits
- [PATCH] D136247: [NFC][SelectionDAG][DebugInfo] Remove duplicate parameter from handleDebugValue
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D136249: [NFC][SelectionDAG][DebugInfo] Refactor DanglingDebugInfo class
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D138107: [AArch64][MachineCombiner] Update isAssociativeAndCommutative
KAWASHIMA Takahiro via Phabricator via llvm-commits
- [llvm] 983f63f - [AArch64][ARM] add Armv8.9-a/Armv9.4-a identifier support
Ties Stuij via llvm-commits
- [PATCH] D138108: [SelectOptimize] Add some debug logging. NFC
Dave Green via Phabricator via llvm-commits
- [PATCH] D137505: [SCEV] Cache ZExt SCEV expressions.
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D132828: Add new optimization pass of Tree Height Reduction
KAWASHIMA Takahiro via Phabricator via llvm-commits
- [PATCH] D136827: [JT][CT] Preserve exisiting BPI/BFI during JumpThreading
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D130728: [SCEV] Iteratively compute ranges for deeply nested expressions.
Max Kazantsev via Phabricator via llvm-commits
- [llvm] 5ea7b6b - [X86] vselect-avx.ll - add AVX512 test coverage
Simon Pilgrim via llvm-commits
- [PATCH] D138112: [AArch64][MachineCombiner] Use MIMetadata to copy pcsections metadata to reassociated instructions.
Dave Green via Phabricator via llvm-commits
- [llvm] 1814921 - [AArch64][CodeGen] Remove redundant vector negations before concat
Cullen Rhodes via llvm-commits
- [llvm] 5d938eb - Revert "Restore "[MemProf] ThinLTO summary support" with fixes"
Jeremy Morse via llvm-commits
- [llvm] a95a818 - [AArch64] Lower fixed-length vector_shuffle to SVE splat if possible
Cullen Rhodes via llvm-commits
- [llvm] ff252e6 - [X86] combineConcatVectorOps - don't concat(vselect,vselect) if the concatenated selection mask isn't legal
Simon Pilgrim via llvm-commits
- [llvm] f897951 - [JITLink][RISCV] Add R_RISCV_LO12_S relocation support
via llvm-commits
- [PATCH] D138116: [AArch64][SVE] Ensure redundant PTEST are removed with an 'invalid' PTRUE
Bradley Smith via Phabricator via llvm-commits
- [PATCH] D133294: [Assignment Tracking][11/*] Update RemoveRedundantDbgInstrs
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D136320: [Assignment Tracking Analysis][1/*] Add analysis pass core
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D136255: [Assignment Tracking][25/*] Replace sunk address uses in dbg.assign intrinsics
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D137707: [WIP] Move "auto-init" instructions to the dominator of their users
serge via Phabricator via llvm-commits
- [llvm] 4898568 - [Assignment Tracking][11/*] Update RemoveRedundantDbgInstrs
via llvm-commits
- [llvm] 49510c5 - [AArch64] Mark all instructions that read/write FPCR as doing so
John Brawn via llvm-commits
- [llvm] 5f7f484 - [AArch64] Add GPR rr instructions to isAssociativeAndCommutative
David Green via llvm-commits
- [PATCH] D134260: [AArch64] Add GPR rr instructions to isAssociativeAndCommutative
Dave Green via Phabricator via llvm-commits
- [PATCH] D138122: Lift EHPersonalities from Analysis to IR (NFC)
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D138123: [Verifier][WinEH] Check funclet tokens on intrinsic calls that may lower to function calls
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D135270: [WinEH] Validate funclet tokens in colorEHFunclets()
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D138124: [NFC] Fix typo in comment
Allen zhong via Phabricator via llvm-commits
- [llvm] a92f5a0 - [DAG] simplifySelect - add support for vselect(0, T, F) -> F fold
Simon Pilgrim via llvm-commits
- [llvm] 7160987 - [AArch64][MachineCombiner] Use MIMetadata to copy pcsections metadata to reassociated instructions.
David Green via llvm-commits
- [PATCH] D136325: [Assignment Tracking Analysis][3/*] Memory location fragment filling
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [llvm] e468b1b - [AMDGPU][GFX11] Refactor VOPD operands handling
Dmitry Preobrazhensky via llvm-commits
- [PATCH] D134866: [WinEH] Fix PreISel intrinsics in funclet catchret.dest blocks
Stefan Gränitz via Phabricator via llvm-commits
- [PATCH] D137547: [AArch64][SVE] Use PTRUE instruction for get_active_lane_mask intrinsic if the range is appropriate for predicator constant
Dinar Temirbulatov via Phabricator via llvm-commits
- [llvm] 56470b7 - [lit] Add `target=<triple>` as a feature keyword
Paul Robinson via llvm-commits
- [llvm] 41a3f92 - [AArch64][CodeGen] Add AArch64 support for complex deinterleaving
Nicholas Guy via llvm-commits
- [PATCH] D138132: [JumpThreading] Preserve profile metadata during select unfolding
Roman Paukner via Phabricator via llvm-commits
- [PATCH] D138133: [AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
Dmitry Preobrazhensky via Phabricator via llvm-commits
- [llvm] 462e461 - [AMDGPU] Reinstate some dwordx3 tests
Jay Foad via llvm-commits
- [PATCH] D135808: [LoopInterchange] Correcting the profitability checking for vectorization
Michael Kruse via Phabricator via llvm-commits
- [llvm] 332c4af - Revert "[NFC] Make format() more amenable to format attributes"
Muhammad Omair Javaid via llvm-commits
- [PATCH] D138135: [WIP][ELF] Support LoongArch
WÁNG Xuěruì via Phabricator via llvm-commits
- [PATCH] D138136: [LLVM] Add new vector types for LLVM
Mateja Marjanovic via Phabricator via llvm-commits
- [llvm] ed4943d - [gn build] Port 332c4af35db9
LLVM GN Syncbot via llvm-commits
- [llvm] 8fbb6f8 - [NFC] Fix typo in comment
via llvm-commits
- [llvm] 2f8f17c - [SLP]Fix PR58956: fix insertpoint for reduced buildvector graphs.
Alexey Bataev via llvm-commits
- [PATCH] D88325: IR: Reject unsized sret in verifier
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 712d35b - GlobalISel: Fold some idempotent operations
Matt Arsenault via llvm-commits
- [PATCH] D136949: [Debugify] Accumulate the number of variables in debugify metadata
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D137725: [OpenMP][OMPIRBuilder] Mirgrate getName from clang to OMPIRBuilder
Jan Sjödin via Phabricator via llvm-commits
- [PATCH] D136335: [Assignment Tracking Analysis][5/*] Tests
Orlando Cazalet-Hyams via Phabricator via llvm-commits
- [PATCH] D136383: [PartialInlining] Enable recursive partial inlining.
Mark Lacey via Phabricator via llvm-commits
- [llvm] 6f48e68 - [SME] Store buffer to the correct pointer when setting up lazy-save.
Sander de Smalen via llvm-commits
- [PATCH] D136153: [AArch64] Allow cost computation for interleaved accesses
Paul Walker via Phabricator via llvm-commits
- [PATCH] D136319: [GISel] Rework trunc/shl combine in a generic trunc/shift combine
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D134281: [CGP] Update MemIntrinsic alignment if possible
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D134282: [CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation
Alexander Richardson via Phabricator via llvm-commits
- [llvm] c6a838e - [MCA][X86] Add test coverage for VBMI instructions
Simon Pilgrim via llvm-commits
- [PATCH] D138138: [AMDGPU] Add GFX11 to some tests with manual checks
Jay Foad via Phabricator via llvm-commits
- [llvm] ad3c91e - MemoryBuiltins: Don't check for unsized allocas
Matt Arsenault via llvm-commits
- [PATCH] D133296: [Assignment Tracking][13/*] Account for assignment tracking in SROA
Jeremy Morse via Phabricator via llvm-commits
- [llvm] 2d3d8c9 - [LangRef] remove callbr references from Addresses of BasicBlock section
Nick Desaulniers via llvm-commits
- [llvm] c260024 - [AArch64] NFC: Fix broken test sve-fixed-ld2-alloca.ll
Sander de Smalen via llvm-commits
- [PATCH] D138141: [amdgpu] Reimplement LDS lowering
Jon Chesterfield via Phabricator via llvm-commits
- [llvm] 9eacbba - Restore "[MemProf] ThinLTO summary support" with more fixes
Teresa Johnson via llvm-commits
- [llvm] becf7b2 - [X86] Remove unnecessary override GFNI AFFINE reg-reg overrides from AlderlakeP model
Simon Pilgrim via llvm-commits
- [llvm] f678217 - [llvm-objcopy] XFAIL ELF/update-section.test on 32-bit arm
Muhammad Omair Javaid via llvm-commits
- [lld] cf4f35b - [ELF] Handle GCC collect2 -plugin-opt= on Windows
Teresa Johnson via llvm-commits
- [PATCH] D80249: CodeGen: Don't lazily construct MachineFunctionInfo
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137834: [Support] Reduce Dependence on Host.h
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D137835: [ARM] Move ARM::parseBranchProtection into ARMTargetParserCommon
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D134792: [PowerPC][GISel] support 64 bit load/store
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137838: [RFC][Support] Move TargetParsers to new component
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135463: [FuncSpec] Do not generate multiple copies for identical specializations.
Alexandros Lamprineas via Phabricator via llvm-commits
- [PATCH] D137368: [lld-macho] Overhaul map file code
Muhammad Omair Javaid via Phabricator via llvm-commits
- [llvm] f15de14 - [ARM][AArch64] Move common code into ARMTargetParserCommon
Tomas Matheson via llvm-commits
- [llvm] 9f9fdab - [SLP]Fix PR58766: deleted value used after vectorization.
Alexey Bataev via llvm-commits
- [llvm] 1aa7bd0 - [Hexagon] Rearrange bits in TSFlags, NFC
Krzysztof Parzyszek via llvm-commits
- [llvm] e989b8b - AutoUpgrade: Fix assertion on invalid name mangling usage
Matt Arsenault via llvm-commits
- [PATCH] D133700: [PowerPC] Exploit xxperm, check for dead vectors and substitute vperm with xxperm
Maryam Moghadas via Phabricator via llvm-commits
- [PATCH] D136651: [Clang] Give Clang the ability to use a shared stat cache
Ben Langmuir via Phabricator via llvm-commits
- [PATCH] D135202: [IR] Add an opaque type to LLVM.
Joshua Cranmer via Phabricator via llvm-commits
- [PATCH] D138152: AMDGPU: Add some baseline tests for llvm.amdgcn.trig.preop folding
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D120150: Constant folding of llvm.amdgcn.trig.preop
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136237: [BasicBlockSections] avoid insertting redundant branch to fall through blocks
Rahman Lavaee via Phabricator via llvm-commits
- [llvm] 32f1c55 - [VPlan] Update VPValue::getDef to return VPRecipeBase, adjust name(NFC)
Florian Hahn via llvm-commits
- [PATCH] D137535: [CodeGen][BasicBlockSections] Fix wrong alignment directive placement in basic block section cases
Rahman Lavaee via Phabricator via llvm-commits
- [llvm] b52d328 - [VPlan] Remove unnecessary casts from tests after 32f1c5531b.
Florian Hahn via llvm-commits
- [llvm] bcc9c5d - [LV] Replace unnecessary cast_or_null with cast (NFC).
Florian Hahn via llvm-commits
- [llvm] 239b52d - [VPlan] Update stale comment (NFC).
Florian Hahn via llvm-commits
- [llvm] 3830e4e - AMDGPU: Create poison values instead of undef
Matt Arsenault via llvm-commits
- [PATCH] D137230: [XCOFF] set fragment for XMC_PR csects.
Hubert Tong via Phabricator via llvm-commits
- [PATCH] D135700: [DAGCombine] Simplify (truncate (build_pair x, y)) -> (truncate x) or x
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D130170: [AMDGPU] Stop running IR code sinking pass
Matt Arsenault via Phabricator via llvm-commits
- [llvm] aa16689 - [VPlan] Use recipe type to avoid getDefiningRecipe call (NFC).
Florian Hahn via llvm-commits
- [PATCH] D132190: [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR with different lengths
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D111777: [GlobalISel] Refactor CSEMIRBuilder's handling of unary op constant folding. NFC.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136377: [mlir][MemRefToLLVM] Remove the code for lowering subview
Quentin Colombet via Phabricator via llvm-commits
- [PATCH] D124217: [AMDGPU] Allow finer grain control of an unaligned access speed
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 55f56cd - [VPlan] Introduce VPValue::hasDefiningRecipe helper (NFC).
Florian Hahn via llvm-commits
- [PATCH] D130006: [SPARC] Improve integer branch handling for v9 targets
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D117797: Revert "[amdgpu] Improve the from f32 to i64."
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D133012: [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D128700: [AMDGPU][Clang] Skip adding noundef attribute to AMDGPU HIP device functions
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D131865: Pre-commit test for D131587
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138157: Make -fsanitize=scudo use scudo_standalone. Delete check-scudo.
Mitch Phillips via Phabricator via llvm-commits
- [PATCH] D131863: [CodeGen] Fix restore blocks' BasicBlock information in branch relaxation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135022: [GlobalISel] Implement undef combines for funnel shifts
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D124218: [LoadStoreVectorizer] Consider if operation is faster than before
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D116441: [AMDGPU][GlobalISel] Select op_sel modifiers for VOP3P
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D127551: [GISel] Fix unmerging of constants for big endian target
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D113030: Add a new tool for parallel safe bisection, "llvm-bisectd".
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D116754: Bugfix for application of trivial loop optimization in LoopIdiomRecognize(Github Issue #50308)
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D129818: AMDGPU: Make default AMDHSA Code Object Version to be 5
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D124158: [Clang][Attr] Skip adding noundef attribute to arguments when function has convergent attribute
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D119013: [ArgPromotion][AMDGPU] New MSSA-based function argument promotion pass with input/output argument support
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136310: [SPIR-V] Add atomic_flag builtin implementation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D108322: AMDGPU: Add options to override SGPR and VGPR blocks
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D117765: [AMDGPU][GlobalISel] Select source modifiers for VOP3Opsel
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- [PATCH] D84397: [MSP430] Replace known epilogues with branches to __mspabi_func_epilog_N
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- [PATCH] D111132: [GlobalISel] Better verification of G_UNMERGE_VALUES
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D137352: [scudo] Detect double free when running with MTE.
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D84533: AMDGPU/GlobalISel: Legalize s33 G_ADD, G_SUB and G_MUL
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D106503: MCSubtargetInfo: Add debugging 'features' that dump current CPU bit state
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D130483: [RISCV] Add CodeGen support and MC testcase of RISCV Zca Extension
Craig Topper via Phabricator via llvm-commits
- [PATCH] D102177: [AMDGPU][RFC] Improve sgpr function arguments
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D103694: [AMDGPU] Simplify handleAddressTakenFunctions. NFC.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D75018: Fix nullptr access
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135515: [SPARC] Don't emit deprecated FP branches when targeting v9
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D136676: [AMDGPU] Speedup SIFormMemoryClauses live-in register set calculation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D125759: [AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D93511: [Sink] Process basic blocks with a single successor
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D129813: [AMDGPU] Add IPO pass to infer pointer argument address spaces.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D127546: [GISel] Fix narrowScalar() for big endian targets
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D98591: [CodeGen] Add extension points for TargetPassConfig::addMachinePasses
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D96015: [RegAllocFast] Handle case where operand of copy cannot be assigned.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D70030: [MachineBlockPlacement] Fix UnscheduledPredecessors counter to reflect tail duplication.
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135579: utils/update_mir_test_checks.py: allow checking fixedStack in .mir files
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 5c9b03f - [RISCV] Remove duplicate setOperationAction. NFC
Craig Topper via llvm-commits
- [PATCH] D130903: [AArch64][GlobalISel] Lower formal arguments of AAPCS & ms_abi variadic functions.
Reid Kleckner via Phabricator via llvm-commits
- [llvm] 1310aa1 - AMDGPU: Use -passes for amdgpu-promote-alloca tests
Matt Arsenault via llvm-commits
- [llvm] 7da2d69 - [LoongArch] Transfer MI flags when expand PseudoCALL
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- [PATCH] D137888: [LoongArch] Transfer MI flags when expand PseudoCALL
wanglei via Phabricator via llvm-commits
- [llvm] 8255472 - [LoongArch] Eliminate extra un-accounted-for successors
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- [llvm] 586d5f9 - [SPARC] Improve integer branch handling for v9 targets
Brad Smith via llvm-commits
- [PATCH] D138174: [lld-macho] Increase slop to prevent thunk out of range again.
Mike Hommey via Phabricator via llvm-commits
- [llvm] fd0aeaa - [SPARC] Don't emit deprecated FP branches when targeting v9
Brad Smith via llvm-commits
- [PATCH] D138175: [MemProf] Defer profile file setup until dump time
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D138176: [dsymutil] Fix assertion: (Ref > InputDIE.getOffset()), function cloneDieReferenceAttribute
Jonas Devlieghere via Phabricator via llvm-commits
- [llvm] 7e15ea1 - [RISCV] Add a DAG combine to pre-promote (i1 (truncate (i32 (srl X, Y)))) with Zbs on RV64.
Craig Topper via llvm-commits
- [lld] ff111a9 - [lld-macho] Increase slop to prevent thunk out of range again.
Jez Ng via llvm-commits
- [PATCH] D138177: [LoongArch] Add codegen support for atomicrmw min/max operation on LA64
Gong LingQin via Phabricator via llvm-commits
- [PATCH] D69542: Full Restrict Support - single patch
Slava Zakharin via Phabricator via llvm-commits
- [compiler-rt] 4ae3e13 - [sanitizer] Add ptrace interceptor support for LoongArch
Weining Lu via llvm-commits
- [llvm] cc07185 - [BinaryFormat] Add LoongArch
Weining Lu via llvm-commits
- [PATCH] D137889: [LoongArch] Add support for tail call optimization
Lu Weining via Phabricator via llvm-commits
- [llvm] 2652db4 - Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form
Yashwant Singh via llvm-commits
- [PATCH] D138179: MIPS: fix build from IR files, nan2008 and FpAbi
YunQiang Su via Phabricator via llvm-commits
- [PATCH] D138180: InstCombine: Fold negations of is_fpclass intrinsics
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D135693: [RegisterScavenger][RISCV] Don't search for FrameSetup instrs if we were searching from Non-FrameSetup instrs
Craig Topper via Phabricator via llvm-commits
- [llvm] 2c239da - Revert D135427 "[LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally"
Fangrui Song via llvm-commits
- [PATCH] D136749: [Don't Commit] [DRAFT] Workaround the example in 57861
Chuanqi Xu via Phabricator via llvm-commits
- [lld] 12050a3 - [LTO] Make local linkage GlobalValue in non-prevailing COMDAT available_externally
Fangrui Song via llvm-commits
- [PATCH] D92105: [RISCV] Add pre-emit pass to make more instructions compressible
xuq via Phabricator via llvm-commits
- [llvm] d896ea7 - [llvm-debuginfo-analyzer] Return by reference instead of value.
Carlos Alberto Enciso via llvm-commits
- [PATCH] D138185: [InstCombine] Look through bitcast if possible
Ruiling, Song via Phabricator via llvm-commits
- [PATCH] D138186: InstCombine: Simplify vector load based on demanded elements
Ruiling, Song via Phabricator via llvm-commits
- [compiler-rt] 38b5a37 - [NFC][asan] format __sanitizer_annotate_contiguous_container
Vitaly Buka via llvm-commits
- [compiler-rt] e7376ad - [NFC][asan] clang-format the test
Vitaly Buka via llvm-commits
- [compiler-rt] 605355f - [NFC][asan] Reformat macro
Vitaly Buka via llvm-commits
- [llvm] 4ad8952 - [CodeGen][BasicBlockSections] Fix wrong alignment directive placement in
Sinan Lin via llvm-commits
- [PATCH] D138187: [GlobalISel] Fix crash in applyShiftOfShiftedLogic caused by CSEMIRBuilder reuse instruction
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D138188: Fix broken CI
Sinan Lin via Phabricator via llvm-commits
- [llvm] d24fe81 - ValueTracking: Look through canonicalize in isKnownNeverInfinity
Matt Arsenault via llvm-commits
- [llvm] ba1669c - ValueTracking: Look through fabs and fneg in isKnownNeverInfinity
Matt Arsenault via llvm-commits
- [PATCH] D136344: [ELF][RISCV] Merge `riscv.attributes` sections from all input files
Elena Lepilkina via Phabricator via llvm-commits
- [PATCH] D83089: DomTree: Extract (mostly) read-only logic into type-erased base classes
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D88994: Fix the default alignment of i1 vectors.
Xiaoqiang Xu via Phabricator via llvm-commits
- [llvm] 3ea86a1 - [Sink] Add a single successor test
Fangrui Song via llvm-commits
- [lld] e2c868f - Revert "[lld-macho] Fix bugs around EH_Frame symbols"
Muhammad Omair Javaid via llvm-commits
- [lld] ac3096e - Revert "[lld-macho] Emit map file entry for compact unwind info"
Muhammad Omair Javaid via llvm-commits
- [lld] 38d6202 - Revert "[lld-macho] Overhaul map file code"
Muhammad Omair Javaid via llvm-commits
- [llvm] 96a661d - [GlobalISel] Better verification of G_UNMERGE_VALUES
Jay Foad via llvm-commits
- [llvm] 2d0a2e3 - In ChangePrinters tests, redirect stderr of `diff --help` to stdout
Matt Jacobson via llvm-commits
- [llvm] 374d076 - [MachineCombiner][RISCV] Precommit tests for D136764
Anton Sidorenko via llvm-commits
- [llvm] 2caf1de - Fix broken CI
Sinan Lin via llvm-commits
- [llvm] 898b188 - [AMDGPU] Add GFX11 to some tests with manual checks
Jay Foad via llvm-commits
- [PATCH] D133422: [amdgpu] Expand all ConstantExpr users of LDS variables in instructions
Jay Foad via Phabricator via llvm-commits
- [llvm] 52a4018 - [JT] Preserve exisiting BPI/BFI during JumpThreading
Evgeniy Brevnov via llvm-commits
- [llvm] 50f8eb0 - Revert "[JT] Preserve exisiting BPI/BFI during JumpThreading"
Evgeniy Brevnov via llvm-commits
- [llvm] b6c7907 - [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns
Anton Sidorenko via llvm-commits
- [PATCH] D133118: Fix invalid llvm.dbg.declare after instcombine (#56807)
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D136044: [compiler-rt][builtins] Skip building (b)float16 support on i386-freebsd
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D133307: [Assignment Tracking][14/*] Account for assignment tracking in instcombine
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D137140: [SDAG] Allow scalable vectors in ComputeKnownBits
Paul Walker via Phabricator via llvm-commits
- [PATCH] D133310: [Assignment Tracking][15/*] Account for assignment tracking in simplifycfg
Jeremy Morse via Phabricator via llvm-commits
- [llvm] 89a86ed - [AMDGPU] Autogenerate a test in preparation for upcoming change
Alex Richardson via llvm-commits
- [llvm] 754d258 - [CGP] Update MemIntrinsic alignment if possible
Alex Richardson via llvm-commits
- [PATCH] D138199: [VE] Pass address space to TLI.getPointerTy()
Alexander Richardson via Phabricator via llvm-commits
- [PATCH] D134072: [Support] Provide access to the full mapping in llvm::Annotations
Sam McCall via Phabricator via llvm-commits
- [PATCH] D133955: [AArch64][CostModel] Add costs for fixed operations when using fixed vectors over SVE
Dinar Temirbulatov via Phabricator via llvm-commits
- [PATCH] D136169: [AMDGPU] Avoid SCC clobbering before S_CSELECT_B32
Sebastian Neubauer via Phabricator via llvm-commits
- [PATCH] D137169: [VP] Add support for vp.inttoptr & vp.ptrtoint
Yingchi Long via Phabricator via llvm-commits
- [PATCH] D138201: [AVR] Fix wrong ABI on AVRTiny.
Ben Shi via Phabricator via llvm-commits
- [PATCH] D138202: [OHOS] Add support for OpenHarmony
Pavel Kosov via Phabricator via llvm-commits
- [PATCH] D132541: [llvm-objcopy] Introduce 'ihex-flat' output format.
Simon Tatham via Phabricator via llvm-commits
- [PATCH] D138203: [AArch64][InstCombine] Simplify repeated complex patterns in dupqlane
Matt Devereau via Phabricator via llvm-commits
- [PATCH] D133318: [Assignment Tracking][21/*] Account for assignment tracking in inliner
Jeremy Morse via Phabricator via llvm-commits
- [PATCH] D138205: [AMDGPU] Add support for new LLVM vector types
Mateja Marjanovic via Phabricator via llvm-commits
- [PATCH] D137711: [X86] Use lock add/sub for cases that we only care about the EFLAGS
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D138208: [AArch64][SME] Always allocate a lazy-save buffer if a function has ZA state.
Sander de Smalen via Phabricator via llvm-commits
- [llvm] 662b5f1 - [ARM] Add an extra test for low trip count MVE vectorization. NFC
David Green via llvm-commits
- [PATCH] D136787: [XCOFF] Decode the relocation entries of loader section of xcoff for llvm-readobj
Digger Lin via Phabricator via llvm-commits
- [PATCH] D138211: [AArch64-SVE][StreamingMode]: test insert-vec-elt and vec-shuffle tests.
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D137553: [MemorySSA] Relax assert condition in createDefinedAccess
luxufan via Phabricator via llvm-commits
- [llvm] 8076c70 - [SystemZ] change test to mir to better isolate miscompile; NFC
Sanjay Patel via llvm-commits
- [llvm] 3682180 - [PhaseOrdering] add test for load combining; NFC
Sanjay Patel via llvm-commits
- [PATCH] D137858: ConstantFolding: Constant fold some canonicalizes
Sanjay Patel via Phabricator via llvm-commits
- [llvm] ac82907 - [AArch64][SVE] Ensure redundant PTEST are removed with an 'invalid' PTRUE
Bradley Smith via llvm-commits
- [llvm] 3053a32 - [MemorySSA] Relax assert condition in createDefinedAccess
via llvm-commits
- [PATCH] D138215: [AMDGPU][CodeGen] Support raw TFE buffer loads other than byte, short and d16 ones.
Ivan Kosarev via Phabricator via llvm-commits
- [PATCH] D138216: [AMDGPU] Intrinsic to expose s_wait_event for export ready
David Stuttard via Phabricator via llvm-commits
- [PATCH] D137591: [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via Phabricator via llvm-commits
- [llvm] 6cff86f - [ARM][AArch64] De-template TargetParser types
Tomas Matheson via llvm-commits
- [llvm] 4105794 - [SDAG] Assert we don't see scalable VECTOR_SHUFFLES
Philip Reames via llvm-commits
- [PATCH] D115713: [LV] Don't apply "TinyTripCountVectorThreshold" for loops with compile time known TC.
Dave Green via Phabricator via llvm-commits
- [llvm] 29e4363 - ValueTracking: Look through fneg in isKnownNeverNaN
Matt Arsenault via llvm-commits
- [PATCH] D123394: [CodeGen] Late cleanup of redundant address/immediate definitions.
Jonas Paulsson via Phabricator via llvm-commits
- [llvm] 4976216 - [AMDGPU] Remove isLiteralConstant and isLiteralConstantLike
Jay Foad via llvm-commits
- [PATCH] D138218: [llvm-ar] Fix when llvm-ar fails to replace existing members when updating a thin archive
Owen Reynolds via Phabricator via llvm-commits
- [llvm] af7e80b - ValueTracking: Look through copysign in isKnownNeverInfinity
Matt Arsenault via llvm-commits
- [PATCH] D138220: [OpenMP][OMPIRBuilder] Add a configuration class to captures flags/attributes that affect codegen
Jan Sjödin via Phabricator via llvm-commits
- [llvm] bcaf31e - [AMDGPU] Allow finer grain control of an unaligned access speed
Stanislav Mekhanoshin via llvm-commits
- [llvm] 6a3561d - [NFC][SROA] Add test for select speculation failures
Roman Lebedev via llvm-commits
- [llvm] be1f994 - [Analysis] `isSafeToLoadUnconditionally()`: `lifetime` intrinsics can be ignored
Roman Lebedev via llvm-commits
- [PATCH] D138222: [AArch64][SVE]: Force generating valid code for insert-vector-elt.ll test.
hassnaaHamdi via Phabricator via llvm-commits
- [llvm] f44e846 - [Passes] reduce duplicated CHECK lines in tests; NFC
Sanjay Patel via llvm-commits
- [PATCH] D125845: [InstCombine] Canonicalize GEP of GEP by swapping constant-indexed GEP to the back
Artur Pilipenko via Phabricator via llvm-commits
- [PATCH] D138227: [OPENMP]Initial support for severity clause
Jennifer Yu via Phabricator via llvm-commits
- [llvm] 8adfa29 - [Pipelines] Introduce SROA after (final, run-time) loop unrolling
Roman Lebedev via llvm-commits
- [llvm] cd58333 - [LoopInterchange] Refactor and rewrite validDepInterchange()
via llvm-commits
- [llvm] 70dbd7b - [ARM][AArch64] Use StringRef in TargetParser structs
Tomas Matheson via llvm-commits
- [PATCH] D138228: [LoopPeel] Expose ValueMap of last peeled iteration. NFC
Anna Thomas via Phabricator via llvm-commits
- [llvm] 0ccc45f - [Passes] reduce duplicated CHECK lines in tests; NFC
Sanjay Patel via llvm-commits
- [llvm] a542d54 - [X86][KCFI] Add support for memory operand unfolding
Sami Tolvanen via llvm-commits
- [compiler-rt] 48dbf35 - [scudo] Extend basic test to cover zero size allocs.
Evgenii Stepanov via llvm-commits
- [PATCH] D137354: [scudo] Extend basic test to cover zero size allocs.
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D138231: [CSSPGO][Preinliner] Use one for zero-sized functions when computing inline budge
Hongtao Yu via Phabricator via llvm-commits
- [PATCH] D133614: handling invalidated passes in change printers
Jamie Schmeiser via Phabricator via llvm-commits
- [PATCH] D138232: Code for calculating number of loop peels based on phi invariance
Jamie Schmeiser via Phabricator via llvm-commits
- [llvm] 8407c99 - [Hexagon] Use BUILD_PAIR instead of HexagonISD::COMBINE in lowering
Krzysztof Parzyszek via llvm-commits
- [llvm] a2a89eb - [Hexagon] Fix lowering loads/stores of scalar vNi1
Krzysztof Parzyszek via llvm-commits
- [llvm] f34fe2a - LangRef: Fix repeated word
Matt Arsenault via llvm-commits
- [llvm] 534b26a - [Hexagon] Improve inserting/extracting to/from scalar predicates
Krzysztof Parzyszek via llvm-commits
- [PATCH] D137642: [X86][CodeGen] Fix crash in hotpatch
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D138215: [AMDGPU][CodeGen] Support raw format TFE buffer loads other than byte, short and d16 ones.
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 950f248 - [NFC][SROA] Add more tests with non-speculatable `load`s of `select`s
Roman Lebedev via llvm-commits
- [compiler-rt] 7052164 - [UBSan] Implementation NonUniqueARMRTTIBit __type_name has higher bits set on arm64
usama hameed via llvm-commits
- [llvm] eb2a57e - Add generic KCFI operand bundle lowering
Sami Tolvanen via llvm-commits
- [PATCH] D135411: Add generic KCFI operand bundle lowering
Sami Tolvanen via Phabricator via llvm-commits
- [llvm] 35cc9bc - [Hexagon] Add ELF flags for Hexagon v71, v71t, and v73
Krzysztof Parzyszek via llvm-commits
- [llvm] 7665369 - [Hexagon] Add instruction definitions for Hexagon v71, v71t, and v73
Krzysztof Parzyszek via llvm-commits
- [PATCH] D136992: [PowerPC] Add new load/store with length instructions to Future CPU.
Maryam Moghadas via Phabricator via llvm-commits
- [PATCH] D138238: [SROA] Change how we speculate `load`s of `select`s -- split block, insert then/else blocks, form two-entry PHI node
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D78234: [BranchFolding] assert when removing INLINEASM_BR indirect targets
Matt Arsenault via Phabricator via llvm-commits
- [llvm] fc91c70 - Revert D135411 "Add generic KCFI operand bundle lowering"
Fangrui Song via llvm-commits
- [PATCH] D138240: AMDGPU: Introduce function pass version of LowerIntrinsics
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 99f730c - Revert "[Hexagon] Add instruction definitions for Hexagon v71, v71t, and v73"
Fangrui Song via llvm-commits
- [llvm] aecae68 - AMDGPU: Convert a test to opaque pointers
Matt Arsenault via llvm-commits
- [PATCH] D137730: [mlir][TilingInterface] Fix a crash in PartialTilingInterface for some inputs
Murali Vijayaraghavan via Phabricator via llvm-commits
- [PATCH] D138217: [OpenMP] Initial parsing and semantic analysis support for 'strict' modifier with 'grainsize' clause of 'taskloop' construct
Fazlay Rabbi via Phabricator via llvm-commits
- [llvm] a98fc08 - [Hexagon] Add instruction definitions for Hexagon v71, v71t, and v73
Krzysztof Parzyszek via llvm-commits
- [PATCH] D138242: [RISCV] Use register allocation hints to improve use of compressed instructions.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D138244: Revert "Reapply: Add an error message to the default SIGPIPE handler"
Bill Wendling via Phabricator via llvm-commits
- [llvm] 1e054e6 - [OPENMP5.1] Initial support for severity clause
Jennifer Yu via llvm-commits
- [PATCH] D138245: [RFC][BOLT] Add test of a jump table crash
Rafael Auler via Phabricator via llvm-commits
- [PATCH] D138246: [AsmPrinter] Fix Crash when Emitting Global Constant of small bit width when targeting Big Endian arch
Henry Yu via Phabricator via llvm-commits
- [PATCH] D136512: [AA] Add aliasAt, for flow-sensitive queries.
David Goldblatt via Phabricator via llvm-commits
- [PATCH] D136513: [AA] Introduce separate storage alias analysis
David Goldblatt via Phabricator via llvm-commits
- [PATCH] D136514: [AA][Intrinsics] Add separate_storage assumptions.
David Goldblatt via Phabricator via llvm-commits
- [PATCH] D138249: [WebAssembly] Update relaxed-simd instruction names
Thomas Lively via Phabricator via llvm-commits
- [llvm] 07015e1 - [SLP]Fix PR59053: trying to erase instruction with users.
Alexey Bataev via llvm-commits
- [llvm] 7059a6c - [IR] Split out IR printing passes into IRPrinter
Alexander Shaposhnikov via llvm-commits
- [PATCH] D135282: [SLP]Improve costs of vectorized loads/stores by analyzing GEPs.
Valeriy Dmitriev via Phabricator via llvm-commits
- [llvm] 7a715bf - [VP] Add support for vp.inttoptr & vp.ptrtoint
Yingchi Long via llvm-commits
- [llvm] ae43420 - AMDGPU/GlobalISel: Fix not selecting modifiers for f16 fma on gfx9
Matt Arsenault via llvm-commits
- [PATCH] D138254: [llvm] Remove LLVM_VERSION_SUFFIX from created shared library names
Brad Smith via Phabricator via llvm-commits
- [PATCH] D133103: [PowerPC] Improve kill flag computation and add verification after MI peephole
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D136728: [PowerPC] Add handling for WACC register spilling.
Amy Kwan via Phabricator via llvm-commits
- [PATCH] D137921: [LLD][ELF] Add support for OpenBSD PT_OPENBSD_MUTABLE segment type
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D138256: [AMDGPU] Fix PreRARematStage::sinkTriviallyRematInsts region boundary update after sinking.
Valery Pykhtin via Phabricator via llvm-commits
- [llvm] fe5b9a6 - AMDGPU/GlobalISel: Make strict fadd, fmul and fma legal
Matt Arsenault via llvm-commits
- [PATCH] D136055: [ValueTracking] Make !range metadata imply noundef for load & call results
Max Kazantsev via Phabricator via llvm-commits
- [llvm] ab9eac7 - [OpenMP] Initial parsing/sema for 'strict' modifier with 'grainsize' clause
Mike Rice via llvm-commits
- [llvm] 34ab474 - [opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm
Alexander Shaposhnikov via llvm-commits
- [PATCH] D138260: [RISCV] Prevent constant hoisting for (and (shl X, C), mask<<C)
Craig Topper via Phabricator via llvm-commits
- [PATCH] D125784: [llvm-debuginfo-analyzer] 09 - CodeView Reader
Carlos Alberto Enciso via Phabricator via llvm-commits
- [compiler-rt] d313973 - [asan] Simplify the test
Vitaly Buka via llvm-commits
- [llvm] 2e58d4b - [RISCV] Pre-commit test.
Han-Kuan Chen via llvm-commits
- [llvm] 7e6dbfc - [RISCV] Make lowerVECTOR_SHUFFLEAsVSlidedown follow source until not EXTRACT_SUBVECTOR.
Han-Kuan Chen via llvm-commits
- [PATCH] D138262: [FuzzMutate] Update InstModifierStrategy
Peter Rong via Phabricator via llvm-commits
- [llvm] f034c98 - [PowerPC] mark dead def for ctr be clobber.
Chen Zheng via llvm-commits
- [llvm] 18c5f3c - [RegisterScavenger][RISCV] Don't search for FrameSetup instrs if we were searching from Non-FrameSetup instrs
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- [PATCH] D138264: [COFF] Improve JIT support of weak symbols
Vassil Vassilev via Phabricator via llvm-commits
- [PATCH] D138265: [PowerPC] move ctrloop pass before tail duplication
ChenZheng via Phabricator via llvm-commits
- [compiler-rt] 796b1bd - [NFC][asan] Rename variables in test
Vitaly Buka via llvm-commits
- [llvm] 2c61848 - [Coroutines] Handle the writes to promise alloca prior to
Chuanqi Xu via llvm-commits
- [PATCH] D137241: [WIP] Add ExpandLargeFpConvert Pass
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D138266: [llvm][Bazel] Remove dependency to avoid cycyle.
Adrian Kuegel via Phabricator via llvm-commits
- [PATCH] D137241: [WIP][X86] Add ExpandLargeFpConvert Pass and enable for X86
Freddy, Ye via Phabricator via llvm-commits
- [PATCH] D138269: [LoopFusion] Exit early if one of fusion candidate has guarded branch but the another has not
luxufan via Phabricator via llvm-commits
- [llvm] 7f608a2 - Revert "[opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm"
Mikhail Goncharov via llvm-commits
- [llvm] bfa3551 - [LoongArch] Implement assembler branches pseudo instructions
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- [compiler-rt] d13dd10 - [NFC][asan] Simplify __sanitizer_annotate_contiguous_container
Vitaly Buka via llvm-commits
- [llvm] f102fe7 - Revert "Revert "[opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm""
Alexander Shaposhnikov via llvm-commits
- [llvm] fcd5098 - [Assignment Tracking][14/*] Account for assignment tracking in instcombine
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- [PATCH] D138211: [AArch64-SVE][StreamingMode]: force generating valid instr during copying phy reg.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D138272: [MachineTraceMetrics] Pick the trace successor for an entry block
Anton Sidorenko via Phabricator via llvm-commits
- [llvm] 86464ed - [Assignment Tracking][15/*] Account for assignment tracking in simplifycfg
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- [llvm] 34d88cf - [DAG] Allow folding AND of anyext masked_load with >1 user to zext version
Cullen Rhodes via llvm-commits
- [PATCH] D138276: TableGen: require tablegen cl::opts to be registered explicitly
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D138277: TableGen: include in libLLVM-*.so
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D138278: TableGen: honor LLVM_LINK_LLVM_DYLIB by default
Nicolai Hähnle via Phabricator via llvm-commits
- [PATCH] D137837: [Support] Move Target/CPU Printing out of CommandLine
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D138281: [AArch64][SME]: Generate streaming-compatible code for fp_to_int and int_to_fp.
hassnaaHamdi via Phabricator via llvm-commits
- [llvm] a35ba2a - [AMDGPU] Fix PreRARematStage::sinkTriviallyRematInsts region boundary update after sinking.
Valery Pykhtin via llvm-commits
- [PATCH] D138283: [SVE] Enhanced loop access analysis
dewen via Phabricator via llvm-commits
- [llvm] 96155bf - [AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
Dmitry Preobrazhensky via llvm-commits
- [llvm] d8306b8 - [AArch64][SME]: Use SVE mov instruction for FPR128 registers in streaming-compatible mode.
Hassnaa Hamdi via llvm-commits
- [PATCH] D138211: [AArch64][SME]: Use SVE mov instruction for FPR128 registers in streaming-compatible mode.
Phabricator via llvm-commits
- [PATCH] D98101: [RISCV] Enable the LocalStackSlotAllocation pass support
Dmitrii Petrov via Phabricator via llvm-commits
- [llvm] 63f79fe - [gn build] port 7059a6c32cfa
Nico Weber via llvm-commits
- [PATCH] D138222: [AArch64][SME]: Generate streaming-compatible code for ISD::INSERT_VECTOR_ELT
hassnaaHamdi via Phabricator via llvm-commits
- [llvm] e3cd498 - [Assignment Tracking][21/*] Account for assignment tracking in inliner
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- [llvm] 84fe863 - [AMDGPU] Test MAD formation on GFX11
Jay Foad via llvm-commits
- [llvm] df24501 - [AArch64][SME]: Add precursory tests for D138222
Hassnaa Hamdi via llvm-commits
- [llvm] 79e8bd1 - [AArch64][SME]: Generate streaming-compatible code for ISD::INSERT_VECTOR_ELT.
Hassnaa Hamdi via llvm-commits
- [llvm] 6ac7b34 - Fix inliner test after e3cd498ff7748f967be1bdcc0a994e40ce82268f
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- [llvm] 4ba08d5 - [Assignment Tracking][24/*] Always RemoveRedundantDbgInstrs in instcombine in assignment tracking builds
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- [llvm] 055097b - [X86] Pre-commit tests for pr58685
Phoebe Wang via llvm-commits
- [llvm] 3cf14a7 - [Support] Add support for attaching payloads to points and ranges
Tom Praschan via llvm-commits
- [PATCH] D138288: [AArch64][SME2] Remove vector constraints from zip/uzp (2-vector) instruction classes
David Sherwood via Phabricator via llvm-commits
- [PATCH] D138290: [AArch64][SME]: Generate streaming-compatible code for fp_arith and fp-fma
hassnaaHamdi via Phabricator via llvm-commits
- [llvm] d558255 - [X86] Use lock add/sub for cases that we only care about the EFLAGS
Phoebe Wang via llvm-commits
- [PATCH] D138292: [AArch64][SME]: Generate streaming-compatible code for int-minmax, fp-minmax
hassnaaHamdi via Phabricator via llvm-commits
- [PATCH] D137418: remove extra slash from llvm github url
Yingchi Long via Phabricator via llvm-commits
- [llvm] 9648455 - [docs] remove extra slash from llvm github url
Yingchi Long via llvm-commits
- [PATCH] D138294: [X86] Use lock or/and/xor for cases that we only care about the EFLAGS
Phoebe Wang via Phabricator via llvm-commits
- [PATCH] D137936: [AArch64] Optimize cmp chain before legalization
Allen zhong via Phabricator via llvm-commits
- [llvm] 2e02f00 - [AArch64][SME2] Remove vector constraints from zip/uzp (2-vector) instruction classes
David Sherwood via llvm-commits
- [llvm] dcbf61b - [llvm-ar] Fix when llvm-ar fails to replace existing members when updating a thin archive
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- [llvm] 32bd757 - PEI should be able to use backward walk in replaceFrameIndicesBackward.
Alexander Timofeev via llvm-commits
- [PATCH] D118271: [BOLT] Prepare BOLT for unit-testing
Nico Weber via Phabricator via llvm-commits
- [llvm] 3ae96e9 - ARCRegisterInfo::eliminateFrameIndex updated to fix build error caused by 32bd75716c27d1a094c2436529b596ce1547f6eb
Alexander Timofeev via llvm-commits
- [llvm] 5b6575d - [llvm-reduce] Do not crash when accessing landingpads of invokes.
Florian Hahn via llvm-commits
- [PATCH] D130746: RFC: Uniformity Analysis for Irreducible Control Flow
Sameer Sahasrabuddhe via Phabricator via llvm-commits
- [PATCH] D126506: workflows: Use new custom runners from github
Konrad Wilhelm Kleine via Phabricator via llvm-commits
- [PATCH] D138281: [AArch64][SME]: Generate streaming-compatible code for fp_to_int and int_to_fp, fp-convert, trunk.
hassnaaHamdi via Phabricator via llvm-commits
- [llvm] bc0fea0 - [SDAG] Allow scalable vectors in ComputeKnownBits
Philip Reames via llvm-commits
- [PATCH] D138299: [bolt] Clean up lit site cfg files a bit
Nico Weber via Phabricator via llvm-commits
- [PATCH] D137201: [AggressiveInstCombine] Handle the insert point of the merged load correctly.
Biplob Mishra via Phabricator via llvm-commits
- [PATCH] D138301: [llvm, polly, clang] Stop setting config.enable_shared in most places
Nico Weber via Phabricator via llvm-commits
- [PATCH] D125372: [SCEVExpander] Expand umin_seq using freeze
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D137190: [SDAG] Allow scalable vectors in SimplifyDemanded routines
Philip Reames via Phabricator via llvm-commits
- [PATCH] D137141: [SDAG] Allow scalable vectors in ComputeNumSignBits
Philip Reames via Phabricator via llvm-commits
- [PATCH] D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV
Anton Sidorenko via Phabricator via llvm-commits
- [llvm] ea6693d - [Hexagon] Add missing patterns for mulhs/mulhu
Krzysztof Parzyszek via llvm-commits
- [PATCH] D138303: GlobalISel: Legalize strict_fsub
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138304: [SystemZ][z/OS] Set text flag correctly for llvm-reduce tool
Abhina Sree via Phabricator via llvm-commits
- [PATCH] D130034: [BOLT] Add BinaryContext::IsStripped
Nico Weber via Phabricator via llvm-commits
- [llvm] 44e2c6a - [AArch64][SVE] Use PTRUE instruction instead of WHILELO if the range is appropriate for predicator constant.
Dinar Temirbulatov via llvm-commits
- [PATCH] D138305: [bolt] Make test/X86/end-symbol.test not use "tac"
Nico Weber via Phabricator via llvm-commits
- [PATCH] D128159: [DAG] Enable scalable vectors handling in computeKnownBits
Philip Reames via Phabricator via llvm-commits
- [PATCH] D138306: [bolt] Pass %cflags in test/X86/is-strip.s
Nico Weber via Phabricator via llvm-commits
- [PATCH] D138308: [AMDGPU] Stop looking for implicit M0 uses on MOV instructions
Jay Foad via Phabricator via llvm-commits
- [llvm] 08ec15e - AMDGPU/GlobalISel: Fix strictfp fmul
Matt Arsenault via llvm-commits
- [llvm] d2bbe5a - InstSimplify: Add baseline tests for canonicalize
Matt Arsenault via llvm-commits
- [PATCH] D138309: [AArch64][SME]: Generate streaming-compatible code for int-reduce, fp-reduce
hassnaaHamdi via Phabricator via llvm-commits
- [llvm] 38302c6 - [AMDGPU] Stop looking for implicit M0 uses on MOV instructions
Jay Foad via llvm-commits
- [llvm] 0f3e72e - AMDGPU/GlobalISel: Fix crash after mad/fma_mix fails selection
Petar Avramovic via llvm-commits
- [llvm] 037f5c2 - [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file.
via llvm-commits
- [llvm] e04d2e2 - AMDGPU: Add some baseline tests for llvm.amdgcn.trig.preop folding
Matt Arsenault via llvm-commits
- [PATCH] D137593: [RISCV] Optimize scalable frame setup when VLEN is precisely known
Craig Topper via Phabricator via llvm-commits
- [llvm] e58b116 - [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11
Mirko Brkusanin via llvm-commits
- [PATCH] D137886: [RISCV] Add isel patterns to select slli+shXadd.uw.
Craig Topper via Phabricator via llvm-commits
- [llvm] 98e342d - [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV
Michael Maitland via llvm-commits
- [llvm] 18fda86 - [RISCV] Optimize scalable frame offset calculation when VLEN is precisely known
Philip Reames via llvm-commits
- [llvm] fe56afc - AMDGPU: Fix fcanonicalize constant folding not correctly handling -0.0
Matt Arsenault via llvm-commits
- [PATCH] D138311: [RISCV][CodeGen] Chapter of vector instruction type corresponds with chapters in RISCV vector specification. NFC
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D63401: SROA: Simplify addrspacecasted allocas with volatile accesses
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138312: [OPENMP5.1] Initial support for message clause.
Jennifer Yu via Phabricator via llvm-commits
- [llvm] 184fbfd - [RISCV][CodeGen] Chapter of vector instruction type corresponds with chapters in RISCV vector specification. NFC
Michael Maitland via llvm-commits
- [llvm] 841a0ed - ConstantFolding: Constant fold some canonicalizes
Matt Arsenault via llvm-commits
- [PATCH] D137862: InstCombine: Fold some identities for canonicalize
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 625f08d - [SystemZ][z/OS] Set text flag correctly for llvm-reduce tool
Abhina Sreeskantharajan via llvm-commits
- [PATCH] D138078: [SelectionDAGISel] split critical indirect edges from callbr w/ outputs
Nick Desaulniers via Phabricator via llvm-commits
- [llvm] f8c63a7 - [SDAG] Allow scalable vectors in ComputeNumSignBits
Philip Reames via llvm-commits
- [llvm] db2aa9f - [FuzzMutate] change of format and comment for further code
Peter Rong via llvm-commits
- [llvm] 4787efa - Revert "Reapply: Add an error message to the default SIGPIPE handler"
Bill Wendling via llvm-commits
- [PATCH] D138313: [bolt] Fix std::prev()-past-begin in veneer handling code
Nico Weber via Phabricator via llvm-commits
- [PATCH] D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D138317: [PowerPC] Add support for tune-cpu attribute
Kai Nacke via Phabricator via llvm-commits
- [PATCH] D124385: AMDGPU: Special case divergence analysis for wave ID computation
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138320: [lld-macho] Fix bug in CUE folding that resulted in wrong unwind table.
Vy Nguyen via Phabricator via llvm-commits
- [llvm] 3fb08d1 - [SDAG] Address post commit review feedback from f8c63a7f
Philip Reames via llvm-commits
- [PATCH] D132646: [LLVM][TableGen] Support combined cells in jupyter kernel
Jacques Pienaar via Phabricator via llvm-commits
- [PATCH] D138323: {TableGen] RegisterInfo backend - Add abstraction layer between code generation logic and syntax output
Rot127 via Phabricator via llvm-commits
- [PATCH] D136808: Refactor Tblgen DecoderEmitter to allow multiple language output
Rot127 via Phabricator via llvm-commits
- [llvm] 4c85412 - [MCA][X86] Add test coverage for AVX512CD instructions
Simon Pilgrim via llvm-commits
- [llvm] ffe05b8 - [MCA][X86] Add missing IceLake test coverage for VPOPCNTDQ instructions
Simon Pilgrim via llvm-commits
- [llvm] 87debda - [VectorCombine] check instruction type before dispatching to folds
Sanjay Patel via llvm-commits
- [PATCH] D138324: [SystemZ] Make sure that combineGET_CCMASK() can handle a truncated SELECT_CCMASK.
Jonas Paulsson via Phabricator via llvm-commits
- [PATCH] D138325: [bolt] Stop setting config.llvm_plugin_ext in lit.site.cfg.py.in
Nico Weber via Phabricator via llvm-commits
- [PATCH] D138326: [CodeView] Don't generate dummy unnamed strcut/class/union type.
Zequan Wu via Phabricator via llvm-commits
- [compiler-rt] 1dd5469 - [scudo] Detect double free when running with MTE.
Evgenii Stepanov via llvm-commits
- [llvm] 91deae9 - [MCA][X86] Add test coverage for VPCLMULQDQ instructions
Simon Pilgrim via llvm-commits
- [PATCH] D138328: [OpenMP] Initial parsing and semantic analysis support for 'strict' modifier with 'grainsize' clause on 'taskloop' construct
Fazlay Rabbi via Phabricator via llvm-commits
- [PATCH] D138328: [OpenMP] Initial parsing and semantic analysis support for 'strict' modifier with 'num_tasks' clause on 'taskloop' construct
Alexey Bataev via Phabricator via llvm-commits
- [llvm] cff6d12 - [Bye] Remove legacy pipeline registration
Arthur Eubanks via llvm-commits
- [PATCH] D137504: [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for integers/floats/vectors in registers)
Kai Nacke via Phabricator via llvm-commits
- [llvm] c346cc3 - [Hexagon] Remove non-existent instructions
Krzysztof Parzyszek via llvm-commits
- [llvm] 7c96f61 - [X86][KCFI] Don't fold loads into indirect calls that need a KCFI check
Sami Tolvanen via llvm-commits
- [PATCH] D124219: [AMDGPU] Fine tune LDS misaligned access speed
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [PATCH] D138331: ConstantFolding: Fix handling of canonicalize for ppc_fp128 0s
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138332: [Passes] Don't add CHR pass for CSIRInstr build in PostLink
Rong Xu via Phabricator via llvm-commits
- [PATCH] D138333: [CHR] Add a threshold for the code duplication
Rong Xu via Phabricator via llvm-commits
- [compiler-rt] ea1826e - [MemProf] Defer profile file setup until dump time
Teresa Johnson via llvm-commits
- [PATCH] D138334: Improve llvm-symbolizer search logic for symlink
jeffrey tan via Phabricator via llvm-commits
- [llvm] 1fe1299 - GlobalISel: Legalize strict_fsub
Matt Arsenault via llvm-commits
- [llvm] 102f05b - Revert "[SDAG] Allow scalable vectors in ComputeNumSignBits" and follow up
Philip Reames via llvm-commits
- [llvm] 6705d94 - Revert "[SDAG] Allow scalable vectors in ComputeKnownBits"
Philip Reames via llvm-commits
- [PATCH] D127530: [PowerPC] Extend GlobalISel implementation to emit and/or/xor.
Kai Nacke via Phabricator via llvm-commits
- [llvm] 06e2b44 - [RISCV] Optimize scalable frame setup when VLEN is precisely known
Philip Reames via llvm-commits
- [PATCH] D132561: [Sparc] Mark the g0 register as constant
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138336: [AA] A global cannot escape through nocapture/nocallback call.
Slava Zakharin via Phabricator via llvm-commits
- [llvm] 23481bf - [FuzzMutate] Update InstModifierStrategy
Peter Rong via llvm-commits
- [llvm] b0847b0 - AMDGPU/GlobalISel: Insert freeze when splitting vector G_SEXT_INREG
Matt Arsenault via llvm-commits
- [PATCH] D138337: Add support for kcfi-seal optimization with LTO
Sami Tolvanen via Phabricator via llvm-commits
- [PATCH] D138338: [BOLT][DWARF] Re-enable DWARF5 for asm-func-debug tests
Alexander Yermolovich via Phabricator via llvm-commits
- [PATCH] D138339: [FuzzMutate] New strategy `ShuffleBlockStrategy`
Peter Rong via Phabricator via llvm-commits
- [PATCH] D117064: AMDGPU/GlobalISel: Fix not adding return address use to tail calls
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D138340: [TableGen] Let -register-info-debug dump Offset/Size for each SubRegIndex
Bjorn Pettersson via Phabricator via llvm-commits
- [PATCH] D138341: [TableGen] Fix SubRegIndex size computation for concatenated subregs of unknown size
Bjorn Pettersson via Phabricator via llvm-commits
- [llvm] 01a8c49 - AMDGPU/GlobalISel: Add some end-to-end g_sext_inreg tests
Matt Arsenault via llvm-commits
- [llvm] 56c1660 - [OpenMP] Initial parsing/sema for 'strict' modifier with 'num_tasks' clause
Mike Rice via llvm-commits
- [PATCH] D138342: [LV] Clean up LoopVectorizationCostModel::calculateRegisterUsage. NFC
Bjorn Pettersson via Phabricator via llvm-commits
- [llvm] 3c36de5 - GlobalISel: Try to fold G_SEXT_INREG to G_AND with mask
Matt Arsenault via llvm-commits
- [compiler-rt] 00be357 - [asan] Keep Itanium mangled names in global metadata
Fangrui Song via llvm-commits
- [PATCH] D87704: [AMDGPU] Reduce stack pointer alignment
Matt Arsenault via Phabricator via llvm-commits
- [llvm] fe07eeb - [GlobalISel] Fix crash in applyShiftOfShiftedLogic caused by CSEMIRBuilder reuse instruction
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- [PATCH] D96949: [FuncAttrs] Add willreturn to readonly callsites in mustprogress fns.
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D137810: [AArch64] Correctly recognize -reserve-regs-for-regalloc=X30,X29
Guozhi Wei via Phabricator via llvm-commits
- [PATCH] D59842: RegScavenger: Fix !AllowSpill if no regs are available
Matt Arsenault via Phabricator via llvm-commits
- [llvm] 96c037e - [llvm] - Recognizing 'PT_OPENBSD_MUTABLE' segment type.
Brad Smith via llvm-commits
- [llvm] 9d90cf2 - [OPENMP5.1] Initial support for message clause.
Jennifer Yu via llvm-commits
- [PATCH] D138347: [SelectionDAGBuilder][WIP] Teach visitBr to sink AND along with compares.
Craig Topper via Phabricator via llvm-commits
- [PATCH] D138349: [X86] Minor improvement in X86InstrInfo::optimizeCompareInstr
Kan Shengchen via Phabricator via llvm-commits
- [PATCH] D138349: [X86][NFC] Minor improvement in X86InstrInfo::optimizeCompareInstr
Phoebe Wang via Phabricator via llvm-commits
- [llvm] 0e4378c - [LoongArch] Add emergency spill slot for CFR spill/reload
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- [compiler-rt] f0fbf51 - [test][asan] Simplify test
Vitaly Buka via llvm-commits
- [compiler-rt] 4b4250c - [test][asan] Simplify loops in test
Vitaly Buka via llvm-commits
- [llvm] 6971c1b - [LoongArch] Add support for tail call optimization
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- [llvm] d06b8b4 - [llvm-objdump] Left justify display of OpenBSD headers
Brad Smith via llvm-commits
- [compiler-rt] e37f8e5 - [test][asan] Simplify __sanitizer_verify_contiguous_container test
Vitaly Buka via llvm-commits
- [PATCH] D96646: [NFC] update LangRef for D88645
Alexander Richardson via Phabricator via llvm-commits
- [llvm] aae08b1 - [MCA][X86] Add test coverage for BITALG instructions
Simon Pilgrim via llvm-commits
- [PATCH] D138351: [SVE] Fix incorrect predicate for fixed length int/fp conversion.
Paul Walker via Phabricator via llvm-commits
- [llvm] 3ad13ca - [X86] Regenerate memcpy-2.ll test checks
Simon Pilgrim via llvm-commits
- [llvm] 88be0a2 - [X86] Ensure we're testing the misched-matrix.ll tests with the generic cpu
Simon Pilgrim via llvm-commits
- [PATCH] D138352: [RISCV] Support .variant_cc directive for the assembler.
Yeting Kuo via Phabricator via llvm-commits
- [llvm] e8ea92d - [X86] Remove some unnecessary cvt overrides
Simon Pilgrim via llvm-commits
- [PATCH] D138353: [Passes][VectorCombine] enable early run generally and try load folds
Sanjay Patel via Phabricator via llvm-commits
- [llvm] dbe86a9 - [ConstraintElim] Rename test file to match contents.
Florian Hahn via llvm-commits
- [PATCH] D124306: [UpdateTestChecks] Auto-generate stub bodies for unused prefixes
Douglas Yung via Phabricator via llvm-commits
- [llvm] 5acc03c - [TableGen] SubtargetEmitter.cpp - clang-format includes sorting. NFC.
Simon Pilgrim via llvm-commits
- [PATCH] D138355: [gn build] Add build files for //bolt
Nico Weber via Phabricator via llvm-commits
- [llvm] 50a5e42 - [ConstraintElim] Split up large gep-arithmetic.ll test.
Florian Hahn via llvm-commits
- [llvm] 7c188af - [gn build] Reformat all build files
Nico Weber via llvm-commits
- [PATCH] D138359: [TableGen] CheckSchedClassTables - check for unnecessary scheduler overrides
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D135887: [XCOFF] llvm-readobj support display symbol table of loader section of xcoff object file.
Vitaly Buka via Phabricator via llvm-commits
- [llvm] be95424 - Revert "[XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file."
Vitaly Buka via llvm-commits
- [llvm] 90702f4 - [X86] Remove unnecessary STD + CLD instruction overrides
Simon Pilgrim via llvm-commits
- [llvm] 8033141 - [X86] Remove unnecessary STC instruction overrides
Simon Pilgrim via llvm-commits
- [lld] 926a77b - [ELF][test] Clean up PT_OPENBSD tests
Fangrui Song via llvm-commits
- [llvm] b0fb716 - [ConstraintElim] Add add nsw tests with negative constant.
Florian Hahn via llvm-commits
- [PATCH] D137727: [SPARC] Simplify instruction decoder.
Fangrui Song via Phabricator via llvm-commits
- [PATCH] D138361: [cmake] Fix Findzstd.cmake to handle OpenBSD shared libraries
Michał Górny via Phabricator via llvm-commits
- [PATCH] D138360: [CVP] Eliminate urem when LHS < RHS
Joshua Cao via Phabricator via llvm-commits
- [llvm] 49e483d - [CodeView] Replace GHASH hasher by BLAKE3
Alexandre Ganea via llvm-commits
- [lld] 49e483d - [CodeView] Replace GHASH hasher by BLAKE3
Alexandre Ganea via llvm-commits
- [PATCH] D137101: [CodeView] Replace GHASH hasher by BLAKE3
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Kazu Hirata via llvm-commits
- [llvm] 201b785 - [AArch64] Disable aarch64-enable-gep-opt
David Green via llvm-commits
- [llvm] 5041129 - [ADT] Remove deprecated Any::hasValue
Kazu Hirata via llvm-commits
- [llvm] ba5714d - [MCA][X86] Add test coverage for VP2INTERSECT instructions
Simon Pilgrim via llvm-commits
- [llvm] 474e41f - [MCA][X86] Add test coverage for BF16 instructions
Simon Pilgrim via llvm-commits
- [PATCH] D138362: [AsmPrinter] .addrsig_sym: remove isTransitiveUsedByMetadataOnly
Fangrui Song via Phabricator via llvm-commits
- [llvm] d116378 - Remove unused llvm/IRPrinter/IRPrintingPasses.h or reorder #include after D137768
Fangrui Song via llvm-commits
- [PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register
Fangrui Song via Phabricator via llvm-commits
- [llvm] 6ccf1d2 - [SelectionDAG] Teach getRegistersForValue to return std::optional (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D134320: [llvm] Teach whole program devirtualization about relative vtables
Teresa Johnson via Phabricator via llvm-commits
- [llvm] 5d1ae63 - [Analysis] Teach getOptionalIntLoopAttribute to return std::optional (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D138368: [MLGO] Add LoopPropertiesAnalysis and its printer pass
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [compiler-rt] 27998d9 - [test][asan] Rename variables for less confusion
Vitaly Buka via llvm-commits
- [PATCH] D138369: [MLGO][LoopUnroll] Add logging mechanism for loop partial unroll
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [PATCH] D138370: [MLGO][AsmPrinter] Call-graph reward calculation
Yueh-Ting (eop) Chen via Phabricator via llvm-commits
- [llvm] 510e5fb - [X86] Use lock or/and/xor for cases that we only care about the EFLAGS
Phoebe Wang via llvm-commits
- [PATCH] D138372: Updates and adds tests for i386/ELF JITLink backend
Kshitij Jain via Phabricator via llvm-commits
- [PATCH] D138374: [ADT] Remove deprecated `llvm::array_lengthof`
Joe Loser via Phabricator via llvm-commits
- [llvm] 7b91798 - [Analysis] Use llvm::Optional::value_or (NFC)
Kazu Hirata via llvm-commits
- [PATCH] D138375: [ADT] Simplify determining size for joining items
Joe Loser via Phabricator via llvm-commits
- [PATCH] D138376: Use None consistently (NFC)
Kazu Hirata via Phabricator via llvm-commits
- [llvm] 1fa870b - Use None consistently (NFC)
Kazu Hirata via llvm-commits
- [llvm] f49c2a8 - [ADT] Remove None=1 MSVC workaround
Fangrui Song via llvm-commits
- [llvm] 13fd737 - [X86] znver2 - (V)EXTRACTPSrr takes 2 uops
Simon Pilgrim via llvm-commits
- [llvm] 94d240a - [X86] Remove unnecessary zmm shuffle instruction overrides from IceLake model
Simon Pilgrim via llvm-commits
- [llvm] 420d02b - [MCA][X86] Add test coverage for LOOP/LOOPE/LOOPNE instructions
Simon Pilgrim via llvm-commits
- [llvm] 357f1c4 - [X86] Improve LOOP/LOOPE/LOOPNE schedule on SandyBridge model
Simon Pilgrim via llvm-commits
- [llvm] 611db1c - [X86] Remove unnecessary bit test instruction overrides from znver2 model
Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
- [llvm] a6686aa - [X86] Remove unnecessary RDPMC/RDTSC instruction overrides from znver1/znver2 models
Simon Pilgrim via llvm-commits
- [PATCH] D22505: [clang-format] Access Modifier Use Normal Indent
Björn Schäpers via Phabricator via llvm-commits
- [llvm] 6a8fabf - [MCA][X86] Add test coverage for XSAVE instructions
Simon Pilgrim via llvm-commits
- [llvm] dd9a900 - [X86] Remove unnecessary XGETBV instruction overrides from znver1/znver2 models
Simon Pilgrim via llvm-commits
- [llvm] 4695f59 - [X86] Remove unnecessary SHLD32rri8/SHRD16rri8 instruction override from bdver2 model
Simon Pilgrim via llvm-commits
- [llvm] e2bff1e - [X86] Fix atomic rmw intrinsic expansion for non-opaque pointers
Benjamin Kramer via llvm-commits
- [PATCH] D136762: [LLD][COFF] Survive empty and invalid PCH signature
Alexandre Ganea via Phabricator via llvm-commits
- [llvm] 242a9cf - [LLD][COFF] Survive empty and invalid PCH signature
Alexandre Ganea via llvm-commits
- [PATCH] D138379: [VP][RISCV] Add vp.fshl/fshr and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D138381: [Support] Use a custom base class for FormatVariadicTest.cpp (NFC)
Kazu Hirata via Phabricator via llvm-commits
- [llvm] 3b48a97 - [gn build] port af8c49dc1ec4
Nico Weber via llvm-commits
- [llvm] 421bdc1 - [MCA][X86] Add test coverage for IFMA instructions
Simon Pilgrim via llvm-commits
- [llvm] 7de156d - [MCA][X86] Add missing test coverage for BWI instructions
Simon Pilgrim via llvm-commits
- [llvm] 7524db4 - [llvm] Remove unused forward declarations (NFC)
Kazu Hirata via llvm-commits
- [llvm] 111c298 - [ADT] Simplify determining size for joining items
Joe Loser via llvm-commits
- [llvm] 35df882 - [ADT] Remove deprecated `llvm::array_lengthof`
Joe Loser via llvm-commits
- [llvm] 89365b1 - [X86] IceLakeServer - PACKS instructions take latency 3cy
Simon Pilgrim via llvm-commits
- [llvm] c5a69ae - [ADT] Use std::is_copy_constructible_v (NFC)
Kazu Hirata via llvm-commits
- [llvm] 5b19463 - [Support] Use std::is_convertible_v (NFC)
Kazu Hirata via llvm-commits
- [llvm] a6cb924 - [TableGen] Let -register-info-debug dump Offset/Size for each SubRegIndex
Bjorn Pettersson via llvm-commits
- [llvm] 294fdd9 - [TableGen] Fix SubRegIndex size computation for concatenated subregs of unknown size
Bjorn Pettersson via llvm-commits
- [llvm] 1c308d6 - [LV] Clean up LoopVectorizationCostModel::calculateRegisterUsage. NFC
Bjorn Pettersson via llvm-commits
- [llvm] 752e651 - [ADT] Remove llvm::empty
Kazu Hirata via llvm-commits
- [llvm] 3888913 - [ADT] Remove deperecated methods in OptionalStorage
Kazu Hirata via llvm-commits
- [polly] ad485b7 - Add version to all LLVM cmake package
Thomas Preud'homme via llvm-commits
- [lld] ad485b7 - Add version to all LLVM cmake package
Thomas Preud'homme via llvm-commits
- [lld] 898b6c5 - [ELF] Shuffle SectionBase fields. NFC
Fangrui Song via llvm-commits
- [llvm] 5fef791 - [Analysis] Remove getInverseMinMaxPred
Kazu Hirata via llvm-commits
- [lld] 53b674e - [ELF] InputSectionBase: add bool compressed to avoid overloading size with compressed semantics
Fangrui Song via llvm-commits
- [lld] 2bf5d86 - [ELF] Change rawData to content() and data() to contentMaybeDecompress()
Fangrui Song via llvm-commits
- [PATCH] D137661: [PowerPC] Switch to by-name matching for instructions (part 1 of 2).
James Y Knight via Phabricator via llvm-commits
- [PATCH] D138388: [AArch64] Remove emitCalleeSavedFrameMoves
Kazu Hirata via Phabricator via llvm-commits
- [lld] e8fafaf - [ELF] Replace rawData+size with content_+size+compressedSize
Fangrui Song via llvm-commits
- [lld] 565b3b0 - [ELF] Simplify InputSectionBase::getSize
Fangrui Song via llvm-commits
- [lld] fd6d660 - [ELF] Don't ignore --detect-odr-violations
Fangrui Song via llvm-commits
- [PATCH] D137653: [TableGen] More named sub-operands work.
James Y Knight via Phabricator via llvm-commits
- [llvm] c2ec455 - [LoongArch] Add intrinsics for ibar, break and syscall
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- [llvm] f4d61cd - [CSKY] Lower ISD::ConstantPool node to support getting the address of ConstantPool entry
Zi Xuan Wu via llvm-commits
- [PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions
Wang Pengcheng via Phabricator via llvm-commits
- [llvm] f6d411f - [LoongArch] Make function name in error message consistent with the user input. NFC
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- [PATCH] D134195: [PowerPC] XCOFF exception section support on the integrated assembler path
Paul Scoropan via Phabricator via llvm-commits
- [lld] c3c9e45 - [ELF] Add InputSectionBase::{addRelocs,relocs} and GotSection::addConstant to add/access relocations
Fangrui Song via llvm-commits
- [PATCH] D138398: [DAGCombiner] fold or (and x, y), x --> x
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D136906: [Clang][LoongArch] Implement __builtin_loongarch_dbar builtin
冀卓疌 via Phabricator via llvm-commits
- [lld] 6bca3ad - [ELF] Simplify postScanRelocations with in.got
Fangrui Song via llvm-commits
- [llvm] 2234098 - [PowerPC] XCOFF exception section support on the integrated assembler path
Chen Zheng via llvm-commits
- [llvm] 31b6093 - [Scalar] Teach matchExpandedRem to return std::optional (NFC)
Kazu Hirata via llvm-commits
- [llvm] c61f37b - [Test] Add some examples where IndVars fails to turn condition into invariant
Max Kazantsev via llvm-commits
- [PATCH] D138401: [DAGCombiner] fold or (xor x, y),? patterns
chenglin.bi via Phabricator via llvm-commits
- [PATCH] D137949: [RISCV] Branchless lowering for (select (x < 0), TrueConstant, FalseConstant) and (select (x >= 0), TrueConstant, FalseConstant)
Liao Chunyu via Phabricator via llvm-commits
- [llvm] a7ec7f6 - [LoongArch] Support parsing la* pseudo instructions
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Last message date:
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Archived on: Tue Dec 6 14:52:34 PST 2022
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