[llvm] a35ba2a - [AMDGPU] Fix PreRARematStage::sinkTriviallyRematInsts region boundary update after sinking.

[Valery Pykhtin via llvm-commits]

Author: Valery Pykhtin
Date: 2022-11-18T12:13:14+01:00
New Revision: a35ba2a2568de0281754388bdf1497fe851bdeae

URL: https://github.com/llvm/llvm-project/commit/a35ba2a2568de0281754388bdf1497fe851bdeae
DIFF: https://github.com/llvm/llvm-project/commit/a35ba2a2568de0281754388bdf1497fe851bdeae.diff

LOG: [AMDGPU] Fix PreRARematStage::sinkTriviallyRematInsts region boundary update after sinking.

First boundary of a region wasn't updated when a sinked instruction was added first into the region.

Reviewed By: vangthao

Differential Revision: https://reviews.llvm.org/D138256

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
index 25fcf422bfbe7..29c42495d93a5 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -1187,7 +1187,7 @@ bool PreRARematStage::sinkTriviallyRematInsts(const GCNSubtarget &ST,
       // LiveRangeEdit::canRematerializeAt().
       TII->reMaterialize(*InsertPos->getParent(), InsertPos, Reg,
                          Def->getOperand(0).getSubReg(), *Def, *DAG.TRI);
-      MachineInstr *NewMI = &*(--InsertPos);
+      MachineInstr *NewMI = &*std::prev(InsertPos);
       LIS->InsertMachineInstrInMaps(*NewMI);
       LIS->removeInterval(Reg);
       LIS->createAndComputeVirtRegInterval(Reg);