[PATCH] D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV

[Anton Sidorenko via Phabricator via llvm-commits]

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To check reassociation correctness for RISCV, we must ensure that the root and
it's sibling have equal rounding modes (for floating point instructions).
`hasReassociableSibling` is a good place to make additional target-dependend
checks.

This patch allows us to enable default machine combiner mechanism to gather
reassociation candidates on RISCV.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138302

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h

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