[PATCH] D137969: [AMDGPU][MC][GFX11] Correct op_sel handling for permlane*16

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp created this revision.
dp added reviewers: Joe_Nash, foad.
Herald added subscribers: kosarev, kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, kzhuravl, arsenm.
Herald added a project: All.
dp requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Unify handling of GFX10 and GFX11 `permlane16` opcodes:

- disable `op_sel` for bits other than 0 and 1.
- correct disassembly to print `op_sel` values for first two bits only.


https://reviews.llvm.org/D137969

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  llvm/test/MC/AMDGPU/gfx11_asm_vop3_err.s
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D137969.475214.patch
Type: text/x-patch
Size: 5093 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221114/8a68bdc2/attachment.bin>