[PATCH] D138104: [AMDGPU] Precommit add_shr_carry test

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/add_shr_carry.ll:53
+}
+
+define i64 @basic_cst_32leadingzeroes(i32 %b, i64 %c) {
----------------
Add some negative cases where the shift amount is wrong, and the type sizes aren't right 


================
Comment at: llvm/test/CodeGen/AMDGPU/add_shr_carry.ll:188
+
+define <3 x i32> @add3_i96(<3 x i32> %0, <3 x i32> %1) {
+; VI-LABEL: add3_i96:
----------------
I guess this is OK, but also add an actual i96 test if we don't have that already?


================
Comment at: llvm/test/CodeGen/AMDGPU/add_shr_carry.ll:241-242
+  %4 = zext i32 %3 to i64
+  %5 = extractelement <3 x i32> %1, i64 0
+  %6 = zext i32 %5 to i64
+  %7 = add nuw nsw i64 %6, %4
----------------
Use named values 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138104/new/

https://reviews.llvm.org/D138104