[PATCH] D138222: [AArch64][SVE]: Force generating valid code for insert-vector-elt.ll test.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 18 02:21:31 PST 2022
sdesmalen added a comment.
LGTM with nit (clang-format) addressed
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:12291
- if (useSVEForFixedLengthVectorVT(Op.getValueType()))
+ if (useSVEForFixedLengthVectorVT(Op.getValueType(), Subtarget->forceStreamingCompatibleSVE()))
return LowerFixedLengthInsertVectorElt(Op, DAG);
----------------
This line looks longer than 80 characters, please use clang-format.
================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-insert-vector-elt.ll:19
+; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
+; CHECK-NEXT: mov z1.h, w8
+; CHECK-NEXT: cmpeq p0.h, p0/z, z2.h, z1.h
----------------
This has nothing to do with your change, but I am surprised that this doesn't use the `dup (immediate)` instruction, such that it can do `mov z1.h, #3`, it seems some logic is missing somewhere.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138222/new/
https://reviews.llvm.org/D138222
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