[PATCH] D138347: [SelectionDAGBuilder][WIP] Teach visitBr to sink AND along with compares.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: efriedma, reames, RKSimon, arsenm.
Herald added subscribers: StephenFan, pengfei, hiraditya.
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visitBr expands i1 And/Or of compares into multiple branches and
basic blocks.

We should also sink any Ands on the compare input if it would allow
the target to use an instruction like x86's TEST.

Need to cleanup some comments and add more tests. But wanted to
get early feedback on the direction.

Another option might be to use CodeGenPrepare to do the expansion.
I think it already does for fast isel. CodeGenPrepare already has
code for sinking Ands to compares.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D138347

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
  llvm/test/CodeGen/X86/pr57402.ll

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