[PATCH] D137937: [TableGen] Represent IntrHasSideEffects using inaccessiblemem read+write

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/Analysis/GlobalsModRef/nosync_nocallback.ll:34
 check:
   call void @llvm.amdgcn.s.barrier()
   %v = load i32, ptr @G1
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jdoerfert wrote:
> arsenm wrote:
> > As counter intuitive as it is, I think this is correct. Can you add a second copy of this test. that uses a fence to show it still isn't moved?
> If this is legal our GPU code isn't. Barrier should be `sync`, and this should not hoist. I'm confused.
Yes, it should be sync. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137937/new/

https://reviews.llvm.org/D137937