[PATCH] D137504: [PowerPC] Implement 64-bit ELFv2 Calling Convention in TableGen (for integers/floats/vectors in registers)

Sat Nov 19 21:19:13 PST 2022

amyk added inline comments.

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Comment at: llvm/lib/Target/PowerPC/PPCCallingConv.cpp:16-18
+static const MCPhysReg ELF64ArgGPRs[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6,
+                                         PPC::X7, PPC::X8, PPC::X9, PPC::X10};
+const unsigned ELF64NumArgGPRs = std::size(ELF64ArgGPRs);
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Kai wrote:
> Since this is only used in `CC_PPC64_ELF_Shadow_GPR_Regs` it can be moved inside the function.
> You could also think about using an `ArrayRef` which would eliminate the need for `ELF64NumArgGPRs`:
> 
> ```
> static ArrayRef<MCPhysReg> ELF64ArgGPRs = {PPC::X3, PPC::X4, PPC::X5, PPC::X6,
>                                            PPC::X7, PPC::X8, PPC::X9, PPC::X10};
> ```
> 
Thanks for the suggestion, Kai! 
I just wanted to understand this a bit more. Is the suggestion to instead use `ArrayRef` and also the `size()` utility that comes along with it? If that is the case, wouldn't I still require `ELF64NumArgGPRs`? 

My apologies if I may have misunderstood the suggestion. 

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137504/new/

https://reviews.llvm.org/D137504