[PATCH] D133012: [AMDGPU] Add subtarget feature for MAD_U64/I64 bug on GFX11

Thu Nov 17 07:47:28 PST 2022

mbrkusanin added inline comments.

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Comment at: llvm/lib/Target/AMDGPU/VOP3Instructions.td:300
+    defm V_MAD_U64_U32_strict : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
+    defm V_MAD_I64_I32_strict : VOP3Inst <"v_mad_i64_i32", VOP3b_I64_I1_I32_I32_I64>;
+  }
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Joe_Nash wrote:
> For other types of instructions (VOPC, VOP2) opName is used as a key into mapping tables, so having duplicate entries with the same name can cause collisions. As long as there are no functional issues, I'm fine with it as is. It will be a tablegen failure if someone tries to add a mapping table and use that as the key in the future.
Is current solutions preferable to having two versions for Real instruction? Problem with having two Reals is we would need to disable one for decoding because of conflict and then manually adjust it, which does not look nice. Encoding is easily resolved with just some extra predicates.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133012/new/

https://reviews.llvm.org/D133012