[PATCH] D137940: [RISCV] Enable reduction pattern SelectICmp and SelectFCmp.

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll:9
+
+define i32 @select_icmp(i32 %x, i32 %y, i32* nocapture readonly %c, i64 %n) #0 {
+; CHECK-LABEL: @select_icmp
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It might be worth making sure that some of the variants in Transforms/LoopVectorize/AArch64/sve-select-cmp.ll also work for RISCV? In particular, `@pred_select_const_i32_from_icmp` since that exposed a bug when I first landed support for this idiom.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137940/new/

https://reviews.llvm.org/D137940