[PATCH] D136319: [GISel] Rework trunc/shl combine in a generic trunc/shift combine

[Thorsten via Phabricator via llvm-commits]

tschuett added a comment.

You have define `generic` opcodes in the *amdgpu* namespace that represent AMDGPU native instructions?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136319/new/

https://reviews.llvm.org/D136319