[PATCH] D138311: [RISCV][CodeGen] Chapter of vector instruction type corresponds with chapters in RISCV vector specification. NFC
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 18 10:24:36 PST 2022
craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.
LGTM
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D138311/new/
https://reviews.llvm.org/D138311
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