[PATCH] D137700: [reg2mem]Skip non-sized Instructions

[Nikita Popov via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG200f3410cd01: [reg2mem] Skip non-sized Instructions (PR58890) (authored by Naville, committed by nikic).

Changed prior to commit:
  https://reviews.llvm.org/D137700?vs=475040&id=475098#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D137700/new/

https://reviews.llvm.org/D137700

Files:
  llvm/lib/Transforms/Scalar/Reg2Mem.cpp
  llvm/test/Transforms/Reg2Mem/catchswitch-crash.ll
  llvm/test/Transforms/Reg2Mem/non-token-test.ll


Index: llvm/test/Transforms/Reg2Mem/non-token-test.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/Reg2Mem/non-token-test.ll
@@ -0,0 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=reg2mem -S < %s | FileCheck %s
+
+%opaque = type opaque
+
+declare %opaque @ret_opaque()
+declare void @pass_opaque(%opaque)
+
+define void @test() {
+; CHECK-LABEL: @test(
+; CHECK-NEXT:    %"reg2mem alloca point" = bitcast i32 0 to i32
+; CHECK-NEXT:    [[X:%.*]] = call [[OPAQUE:%.*]] @ret_opaque()
+; CHECK-NEXT:    br label [[NEXT:%.*]]
+; CHECK:       next:
+; CHECK-NEXT:    call void @pass_opaque([[OPAQUE]] [[X]])
+; CHECK-NEXT:    ret void
+;
+  %x = call %opaque @ret_opaque()
+  br label %next
+
+next:
+  call void @pass_opaque(%opaque %x)
+  ret void
+}
Index: llvm/test/Transforms/Reg2Mem/catchswitch-crash.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/Reg2Mem/catchswitch-crash.ll
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=reg2mem -S < %s | FileCheck %s
+
+declare void @"read_mem"()
+
+define void @"memcpy_seh"() personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) {
+; CHECK-LABEL: @memcpy_seh(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    %"reg2mem alloca point" = bitcast i32 0 to i32
+; CHECK-NEXT:    invoke void @read_mem()
+; CHECK-NEXT:    to label [[CLEANUP:%.*]] unwind label [[CATCH_DISPATCH:%.*]]
+; CHECK:       catch.dispatch:
+; CHECK-NEXT:    [[TMP0:%.*]] = catchswitch within none [label %__except] unwind to caller
+; CHECK:       __except:
+; CHECK-NEXT:    [[TMP1:%.*]] = catchpad within [[TMP0]] [i8* null]
+; CHECK-NEXT:    unreachable
+; CHECK:       cleanup:
+; CHECK-NEXT:    ret void
+;
+entry:
+  invoke void @"read_mem"()
+  to label %cleanup unwind label %catch.dispatch
+
+catch.dispatch:                                   ; preds = %entry
+  %0 = catchswitch within none [label %__except] unwind to caller
+
+__except:                                         ; preds = %catch.dispatch
+  %1 = catchpad within %0 [i8* null]
+  unreachable
+
+cleanup:                                          ; preds = %entry
+  ret void
+}
+
+declare i32 @__C_specific_handler(...)
Index: llvm/lib/Transforms/Scalar/Reg2Mem.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/Reg2Mem.cpp
+++ llvm/lib/Transforms/Scalar/Reg2Mem.cpp
@@ -40,6 +40,9 @@
 STATISTIC(NumPhisDemoted, "Number of phi-nodes demoted");
 
 static bool valueEscapes(const Instruction &Inst) {
+  if (!Inst.getType()->isSized())
+    return false;
+
   const BasicBlock *BB = Inst.getParent();
   for (const User *U : Inst.users()) {
     const Instruction *UI = cast<Instruction>(U);


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