[llvm] 239b52d - [VPlan] Update stale comment (NFC).

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2022-11-16T22:39:50Z
New Revision: 239b52d4b6f67ff198a5c2a495c95dafbd29a8c2

URL: https://github.com/llvm/llvm-project/commit/239b52d4b6f67ff198a5c2a495c95dafbd29a8c2
DIFF: https://github.com/llvm/llvm-project/commit/239b52d4b6f67ff198a5c2a495c95dafbd29a8c2.diff

LOG: [VPlan] Update stale comment (NFC).

Update comment to reflect current code, which also allows for
VPScalarIVStepsRecipes to be uniform.

Suggested by @Ayal during review of D136068, thanks!

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Removed: 
    


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diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index ab882acb1aeb..99e7f59b6f35 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -9873,7 +9873,7 @@ Value *VPTransformState::get(VPValue *Def, unsigned Part) {
   unsigned LastLane = IsUniform ? 0 : VF.getKnownMinValue() - 1;
   // Check if there is a scalar value for the selected lane.
   if (!hasScalarValue(Def, {Part, LastLane})) {
-    // At the moment, VPWidenIntOrFpInductionRecipes can also be uniform.
+    // At the moment, VPWidenIntOrFpInductionRecipes and VPScalarIVStepsRecipes can also be uniform.
     assert((isa<VPWidenIntOrFpInductionRecipe>(Def->getDefiningRecipe()) ||
             isa<VPScalarIVStepsRecipe>(Def->getDefiningRecipe())) &&
            "unexpected recipe found to be invariant");