[llvm] 6cff86f - [ARM][AArch64] De-template TargetParser types

[Tomas Matheson via llvm-commits]

Author: Tomas Matheson
Date: 2022-11-17T16:12:38Z
New Revision: 6cff86ff7e5cd3dad7e7a77b4169df9a7b4c57b3

URL: https://github.com/llvm/llvm-project/commit/6cff86ff7e5cd3dad7e7a77b4169df9a7b4c57b3
DIFF: https://github.com/llvm/llvm-project/commit/6cff86ff7e5cd3dad7e7a77b4169df9a7b4c57b3.diff

LOG: [ARM][AArch64] De-template TargetParser types

Differential Revision: https://reviews.llvm.org/D138019

Added: 
    

Modified: 
    llvm/include/llvm/Support/AArch64TargetParser.h
    llvm/include/llvm/Support/ARMTargetParser.h
    llvm/lib/Support/ARMTargetParser.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/Support/AArch64TargetParser.h b/llvm/include/llvm/Support/AArch64TargetParser.h
index 242a0d38593bc..8005cdb807c5c 100644
--- a/llvm/include/llvm/Support/AArch64TargetParser.h
+++ b/llvm/include/llvm/Support/AArch64TargetParser.h
@@ -83,13 +83,13 @@ enum class ArchKind {
 #include "AArch64TargetParser.def"
 };
 
-template <typename T> struct ArchNames {
+struct ArchNames {
   const char *NameCStr;
   size_t NameLength;
   const char *SubArchCStr;
   size_t SubArchLength;
   uint64_t ArchBaseExtensions;
-  T ID;
+  ArchKind ID;
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
 
@@ -104,7 +104,7 @@ template <typename T> struct ArchNames {
   }
 };
 
-const ArchNames<ArchKind> AArch64ARCHNames[] = {
+const ArchNames AArch64ARCHNames[] = {
 #define AARCH64_ARCH(NAME, ID, SUB_ARCH, ARCH_BASE_EXT)                        \
   {NAME,          sizeof(NAME) - 1,     "+" SUB_ARCH, sizeof(SUB_ARCH),        \
    ARCH_BASE_EXT, AArch64::ArchKind::ID},
@@ -132,17 +132,17 @@ const ExtName AArch64ARCHExtNames[] = {
 // The same CPU can have multiple arches and can be default on multiple arches.
 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
 // When this becomes table-generated, we'd probably need two tables.
-template <typename T> struct CpuNames {
+struct CpuNames {
   const char *NameCStr;
   size_t NameLength;
-  T ArchID;
+  ArchKind ArchID;
   bool Default; // is $Name the default CPU for $ArchID ?
   uint64_t DefaultExtensions;
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
 };
 
-const CpuNames<ArchKind> AArch64CPUNames[] = {
+const CpuNames AArch64CPUNames[] = {
 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)       \
   {NAME, sizeof(NAME) - 1, AArch64::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
 #include "AArch64TargetParser.def"
@@ -178,7 +178,6 @@ inline ArchKind &operator--(ArchKind &Kind) {
   return Kind;
 }
 
-// FIXME: These should be moved to TargetTuple once it exists
 bool getExtensionFeatures(uint64_t Extensions,
                           std::vector<StringRef> &Features);
 bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features);

diff  --git a/llvm/include/llvm/Support/ARMTargetParser.h b/llvm/include/llvm/Support/ARMTargetParser.h
index 8978ed1465add..2ea05f0816eb0 100644
--- a/llvm/include/llvm/Support/ARMTargetParser.h
+++ b/llvm/include/llvm/Support/ARMTargetParser.h
@@ -111,17 +111,17 @@ enum class ArchKind {
 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
 // When this becomes table-generated, we'd probably need two tables.
 // FIXME: TableGen this.
-template <typename T> struct CpuNames {
+struct CpuNames {
   const char *NameCStr;
   size_t NameLength;
-  T ArchID;
+  ArchKind ArchID;
   bool Default; // is $Name the default CPU for $ArchID ?
   uint64_t DefaultExtensions;
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
 };
 
-const CpuNames<ArchKind> CPUNames[] = {
+const CpuNames CPUNames[] = {
 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
   {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
 #include "ARMTargetParser.def"
@@ -192,7 +192,7 @@ static const FPUName FPUNames[] = {
 // of the triples and are not conforming with their official names.
 // Check to see if the expectation should be changed.
 // FIXME: TableGen this.
-template <typename T> struct ArchNames {
+struct ArchNames {
   const char *NameCStr;
   size_t NameLength;
   const char *CPUAttrCStr;
@@ -201,7 +201,7 @@ template <typename T> struct ArchNames {
   size_t SubArchLength;
   unsigned DefaultFPU;
   uint64_t ArchBaseExtensions;
-  T ID;
+  ArchKind ID;
   ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
 
   StringRef getName() const { return StringRef(NameCStr, NameLength); }
@@ -220,7 +220,7 @@ template <typename T> struct ArchNames {
   }
 };
 
-static const ArchNames<ArchKind> ARMArchNames[] = {
+static const ArchNames ARMArchNames[] = {
 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU,            \
                  ARCH_BASE_EXT)                                                \
   {NAME,         sizeof(NAME) - 1,                                             \
@@ -251,7 +251,6 @@ FPUVersion getFPUVersion(unsigned FPUKind);
 NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
 FPURestriction getFPURestriction(unsigned FPUKind);
 
-// FIXME: These should be moved to TargetTuple once it exists
 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
 bool getHWDivFeatures(uint64_t HWDivKind, std::vector<StringRef> &Features);
 bool getExtensionFeatures(uint64_t Extensions,

diff  --git a/llvm/lib/Support/ARMTargetParser.cpp b/llvm/lib/Support/ARMTargetParser.cpp
index 53db7b5dda8bb..e14594acd063c 100644
--- a/llvm/lib/Support/ARMTargetParser.cpp
+++ b/llvm/lib/Support/ARMTargetParser.cpp
@@ -487,7 +487,7 @@ ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
 }
 
 void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
-  for (const CpuNames<ArchKind> &Arch : CPUNames) {
+  for (const auto &Arch : CPUNames) {
     if (Arch.ArchID != ArchKind::INVALID)
       Values.push_back(Arch.getName());
   }