[llvm] f897951 - [JITLink][RISCV] Add R_RISCV_LO12_S relocation support
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Wed Nov 16 03:50:48 PST 2022
Author: luxufan
Date: 2022-11-16T19:50:18+08:00
New Revision: f8979512eabf3e55384d64f0aa781696550ad611
URL: https://github.com/llvm/llvm-project/commit/f8979512eabf3e55384d64f0aa781696550ad611
DIFF: https://github.com/llvm/llvm-project/commit/f8979512eabf3e55384d64f0aa781696550ad611.diff
LOG: [JITLink][RISCV] Add R_RISCV_LO12_S relocation support
Fixes: https://github.com/llvm/llvm-project/issues/58979
Reviewed By: Hahnfeld
Differential Revision: https://reviews.llvm.org/D138030
Added:
Modified:
llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
llvm/lib/ExecutionEngine/JITLink/riscv.cpp
llvm/test/ExecutionEngine/JITLink/RISCV/ELF_abs_reloc.s
Removed:
################################################################################
diff --git a/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h b/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
index 95f45fae91e40..e8930afbef7c2 100644
--- a/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
+++ b/llvm/include/llvm/ExecutionEngine/JITLink/riscv.h
@@ -57,6 +57,13 @@ enum EdgeKind_riscv : Edge::Kind {
/// Fixup <- (Target + Addend + 0x800) >> 12
R_RISCV_HI20,
+ /// Low 12 bits of 32-bit pointer value relocation, used by S type instruction
+ /// format
+ ///
+ /// Fixup expression
+ /// Fixup <- (Target + Addend) & 0xFFF
+ R_RISCV_LO12_S,
+
/// Low 12 bits of 32-bit pointer value relocation
///
/// Fixup expression
diff --git a/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp b/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
index 740884fbcb276..c7839ac81ee7e 100644
--- a/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
@@ -247,6 +247,17 @@ class ELFJITLinker_riscv : public JITLinker<ELFJITLinker_riscv> {
(RawInstr & 0xFFFFF) | (static_cast<uint32_t>(Lo & 0xFFF) << 20);
break;
}
+ case R_RISCV_LO12_S: {
+ // FIXME: We assume that R_RISCV_HI20 is present in object code and pairs
+ // with current relocation R_RISCV_LO12_S. So here may need a check.
+ int64_t Value = (E.getTarget().getAddress() + E.getAddend()).getValue();
+ int64_t Lo = Value & 0xFFF;
+ uint32_t Imm31_25 = extractBits(Lo, 5, 7) << 25;
+ uint32_t Imm11_7 = extractBits(Lo, 0, 5) << 7;
+ uint32_t RawInstr = *(little32_t *)FixupPtr;
+ *(little32_t *)FixupPtr = (RawInstr & 0x1FFF07F) | Imm31_25 | Imm11_7;
+ break;
+ }
case R_RISCV_CALL: {
int64_t Value = E.getTarget().getAddress() + E.getAddend() - FixupAddress;
int64_t Hi = Value + 0x800;
@@ -429,6 +440,8 @@ class ELFLinkGraphBuilder_riscv : public ELFLinkGraphBuilder<ELFT> {
return EdgeKind_riscv::R_RISCV_HI20;
case ELF::R_RISCV_LO12_I:
return EdgeKind_riscv::R_RISCV_LO12_I;
+ case ELF::R_RISCV_LO12_S:
+ return EdgeKind_riscv::R_RISCV_LO12_S;
case ELF::R_RISCV_CALL:
return EdgeKind_riscv::R_RISCV_CALL;
case ELF::R_RISCV_PCREL_HI20:
diff --git a/llvm/lib/ExecutionEngine/JITLink/riscv.cpp b/llvm/lib/ExecutionEngine/JITLink/riscv.cpp
index eecac29b0b41c..98ef1ad8df1aa 100644
--- a/llvm/lib/ExecutionEngine/JITLink/riscv.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/riscv.cpp
@@ -32,6 +32,8 @@ const char *getEdgeKindName(Edge::Kind K) {
return "R_RISCV_HI20";
case R_RISCV_LO12_I:
return "R_RISCV_LO12_I";
+ case R_RISCV_LO12_S:
+ return "R_RISCV_LO12_S";
case R_RISCV_PCREL_HI20:
return "R_RISCV_PCREL_HI20";
case R_RISCV_PCREL_LO12_I:
diff --git a/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_abs_reloc.s b/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_abs_reloc.s
index b70f8f816b3b3..d4858091d9b52 100644
--- a/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_abs_reloc.s
+++ b/llvm/test/ExecutionEngine/JITLink/RISCV/ELF_abs_reloc.s
@@ -5,11 +5,11 @@
# RUN: -o %t/elf_riscv32_non_pc_indirect_reloc.o %s
# RUN: llvm-jitlink -noexec \
# RUN: -slab-allocate 100Kb -slab-address 0x1ff00000 -slab-page-size 4096 \
-# RUN: -abs external_data=0x1ff10000 \
+# RUN: -abs external_data=0x1ff11115 \
# RUN: -check %s %t/elf_riscv64_non_pc_indirect_reloc.o
# RUN: llvm-jitlink -noexec \
# RUN: -slab-allocate 100Kb -slab-address 0x1ff00000 -slab-page-size 4096 \
-# RUN: -abs external_data=0x1ff10000 \
+# RUN: -abs external_data=0x1ff11115 \
# RUN: -check %s %t/elf_riscv32_non_pc_indirect_reloc.o
#
@@ -29,11 +29,13 @@ main:
# jitlink-check: decode_operand(test_abs_rel, 1) = (external_data + 0x800)[31:12]
# jitlink-check: decode_operand(test_abs_rel+4, 2)[11:0] = (external_data)[11:0]
+# jitlink-check: decode_operand(test_abs_rel+8, 2)[11:0] = (external_data)[11:0]
.globl test_abs_rel
.p2align 1
.type test_abs_rel, at function
test_abs_rel:
- lui a0, %hi(external_data)
- lw a0, %lo(external_data)(a0)
+ lui a1, %hi(external_data)
+ lw a0, %lo(external_data)(a1)
+ sw a0, %lo(external_data)(a1)
.size test_abs_rel, .-test_abs_rel
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