[PATCH] D138051: AMDGPU/GlobalISel: Fix broken expansion of 64-bit vector sext_inreg
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 15 13:21:28 PST 2022
arsenm added a comment.
In D138051#3928610 <https://reviews.llvm.org/D138051#3928610>, @foad wrote:
> I try not to think about shifts at all. The second input operand is just the bit width to extend from.
It's hard to not when trying to lift into IR for alive
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https://reviews.llvm.org/D138051/new/
https://reviews.llvm.org/D138051
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