[llvm] d8306b8 - [AArch64][SME]: Use SVE mov instruction for FPR128 registers in streaming-compatible mode.

[Hassnaa Hamdi via llvm-commits]

Author: Hassnaa Hamdi
Date: 2022-11-18T11:18:30Z
New Revision: d8306b88855d7c964ac2b26304ca0fe5f06f3aea

URL: https://github.com/llvm/llvm-project/commit/d8306b88855d7c964ac2b26304ca0fe5f06f3aea
DIFF: https://github.com/llvm/llvm-project/commit/d8306b88855d7c964ac2b26304ca0fe5f06f3aea.diff

LOG: [AArch64][SME]: Use SVE mov instruction for FPR128 registers in streaming-compatible mode.

1- in streaming mode, use SVE OR/mov instruction instead of NEON OR,
   during copying phyReg -AArch64InstrInfo::copyPhysReg-.
2- add testing file:
   register-mov.ll

Differential Revision: https://reviews.llvm.org/D138211

Added: 
    llvm/test/CodeGen/AArch64/sve-streaming-mode-test-register-mov.ll

Modified: 
    llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 4b17e5ed326bd..ba3d7550eea5f 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -3687,7 +3687,12 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
 
   if (AArch64::FPR128RegClass.contains(DestReg) &&
       AArch64::FPR128RegClass.contains(SrcReg)) {
-    if (Subtarget.hasNEON()) {
+    if (Subtarget.forceStreamingCompatibleSVE()) {
+      BuildMI(MBB, I, DL, get(AArch64::ORR_ZZZ))
+          .addReg(AArch64::Z0 + (DestReg - AArch64::Q0), RegState::Define)
+          .addReg(AArch64::Z0 + (SrcReg - AArch64::Q0))
+          .addReg(AArch64::Z0 + (SrcReg - AArch64::Q0));
+    } else if (Subtarget.hasNEON()) {
       BuildMI(MBB, I, DL, get(AArch64::ORRv16i8), DestReg)
           .addReg(SrcReg)
           .addReg(SrcReg, getKillRegState(KillSrc));

diff  --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-test-register-mov.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-test-register-mov.ll
new file mode 100644
index 0000000000000..5f2c3d77f9a0f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/sve-streaming-mode-test-register-mov.ll
@@ -0,0 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -force-streaming-compatible-sve  < %s | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+; A NEON Q-register mov is not valid in streaming mode, but an SVE Z-register mov is.
+define fp128 @test_streaming_compatible_register_mov(fp128 %q0, fp128 %q1) #0 {
+; CHECK-LABEL: test_streaming_compatible_register_mov:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    mov z0.d, z1.d
+; CHECK-NEXT:    ret
+  ret fp128 %q1
+}
+
+attributes #0 = { "target-features"="+sve" }