[PATCH] D138050: AMDGPU/GlobalISel: Insert freeze when splitting vector G_SEXT_INREG

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added a comment.

What makes this combine specifically require a freeze? Could we have more combine that need it to or is it something with G_SEXT_INREG's semantics that makes it need the G_FREEZE?



================
Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:2450
     if (Amt <= 32) {
       if (Amt == 32) {
         // The low bits are unchanged.
----------------
I would add some context to describe why freeze is needed here, since it's not an instruction that's often seen (at least for me)


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138050/new/

https://reviews.llvm.org/D138050