[PATCH] D138359: [TableGen] CheckSchedClassTables - check for unnecessary scheduler overrides

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added a comment.

In D138359#3939221 <https://reviews.llvm.org/D138359#3939221>, @RKSimon wrote:

> In D138359#3939209 <https://reviews.llvm.org/D138359#3939209>, @lebedev.ri wrote:
>
>> Just how more extra noisy does it become?
>
> Current warnings:
> AMDGPU - 1
> AArch64 - 3049
> ARM - 992
> PowerPC - 244
> X86 - 227
>
> Actually its worse than I thought so almost definitely needs addressing before this can land :)

We can only find one overridden pair each time, right?



================
Comment at: llvm/include/llvm/MC/MCSchedule.h:146
+           NumWriteLatencyEntries == RHS.NumWriteLatencyEntries &&
+           (IgnoreRHSReadAdvance || NumReadAdvanceEntries == 0 ||
+            (ReadAdvanceIdx == RHS.ReadAdvanceIdx &&
----------------
RKSimon wrote:
> Sorry - I should have removed the "NumReadAdvanceEntries == 0" entry, it was just an experiment
But the comment mentioned it too?


================
Comment at: llvm/utils/TableGen/CodeGenSchedule.cpp:972
 CodeGenSchedModels::getSchedClassIdx(const CodeGenInstruction &Inst) const {
-  return InstrClassMap.lookup(Inst.TheDef);
 }
----------------
Not familiar with it, does the old function returns `0` too when fail to loopup?


================
Comment at: llvm/utils/TableGen/SubtargetEmitter.cpp:1318
+                   << Inst->TheDef->getName() << "' from '" << CgOrig.Name
+                   << "'\n";
+          }
----------------
Do we need to break the loop?


Repository:
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https://reviews.llvm.org/D138359