[PATCH] D136319: [GISel] Rework trunc/shl combine in a generic trunc/shift combine

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D136319#3931139 <https://reviews.llvm.org/D136319#3931139>, @tschuett wrote:

> You have define `generic` opcodes in the *amdgpu* namespace that represent AMDGPU native instructions?

Yes. They are regbankselectable and have the same restrictions as G_* opcodes


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https://reviews.llvm.org/D136319