[llvm] a92f5a0 - [DAG] simplifySelect - add support for vselect(0, T, F) -> F fold

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 16 05:11:28 PST 2022


Author: Simon Pilgrim
Date: 2022-11-16T13:11:14Z
New Revision: a92f5a08a1eba6a79119d15b4ef6fcc23da48699

URL: https://github.com/llvm/llvm-project/commit/a92f5a08a1eba6a79119d15b4ef6fcc23da48699
DIFF: https://github.com/llvm/llvm-project/commit/a92f5a08a1eba6a79119d15b4ef6fcc23da48699.diff

LOG: [DAG] simplifySelect - add support for vselect(0, T, F) -> F fold

We still need to add handling for the non-zero T fold (which requires getBooleanContents handling)

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/test/CodeGen/X86/vselect-avx.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index f5f1d7ed5396..29322891eed2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -8941,12 +8941,12 @@ SDValue SelectionDAG::simplifySelect(SDValue Cond, SDValue T, SDValue F) {
   if (auto *CondC = dyn_cast<ConstantSDNode>(Cond))
     return CondC->isZero() ? F : T;
 
-  // TODO: This should simplify VSELECT with constant condition using something
-  // like this (but check boolean contents to be complete?):
-  //  if (ISD::isBuildVectorAllOnes(Cond.getNode()))
-  //    return T;
-  //  if (ISD::isBuildVectorAllZeros(Cond.getNode()))
-  //    return F;
+  // TODO: This should simplify VSELECT with non-zero constant condition using
+  // something like this (but check boolean contents to be complete?):
+  if (ConstantSDNode *CondC = isConstOrConstSplat(Cond, /*AllowUndefs*/ false,
+                                                  /*AllowTruncation*/ true))
+    if (CondC->isZero())
+      return F;
 
   // select ?, T, T --> T
   if (T == F)

diff  --git a/llvm/test/CodeGen/X86/vselect-avx.ll b/llvm/test/CodeGen/X86/vselect-avx.ll
index 8b08679d74fe..0d80da8642a1 100644
--- a/llvm/test/CodeGen/X86/vselect-avx.ll
+++ b/llvm/test/CodeGen/X86/vselect-avx.ll
@@ -266,25 +266,10 @@ define void @blendv_split(ptr %p, <8 x i32> %cond, <8 x i32> %a, <8 x i32> %x, <
 }
 
 ; Regression test for rGea8fb3b60196
-; FIXME: Missing fold vselect(zero, T, F) -> F
 define void @vselect_concat() {
-; AVX1-LABEL: vselect_concat:
-; AVX1:       ## %bb.0: ## %entry
-; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
-; AVX1-NEXT:    vmovaps %ymm0, (%rax)
-; AVX1-NEXT:    vzeroupper
-; AVX1-NEXT:    retq
-;
-; AVX2-LABEL: vselect_concat:
-; AVX2:       ## %bb.0: ## %entry
-; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
-; AVX2-NEXT:    vmovaps %ymm0, (%rax)
-; AVX2-NEXT:    vzeroupper
-; AVX2-NEXT:    retq
-;
-; AVX512-LABEL: vselect_concat:
-; AVX512:       ## %bb.0: ## %entry
-; AVX512-NEXT:    retq
+; AVX-LABEL: vselect_concat:
+; AVX:       ## %bb.0: ## %entry
+; AVX-NEXT:    retq
 entry:
   %0 = load <8 x i32>, ptr undef
   %1 = shufflevector <8 x i32> zeroinitializer, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>


        


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