[PATCH] D138107: [AArch64][MachineCombiner] Update isAssociativeAndCommutative

[KAWASHIMA Takahiro via Phabricator via llvm-commits]

kawashima-fj added a subscriber: melver.
kawashima-fj added a comment.

@melver
As shown in the change of `llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll`, the Machine InstCombiner pass removes `pcsections` metadata when replacing `MachineInstr`. I'm not sure it should nor not.

Essentially, the Machine InstCombiner pass changes MIR

  $5 = ADD $1, $2, pcsections !0
  $6 = ADD $5, $3, pcsections !0
  $7 = ADD $6, $4, pcsections !0

to

  $5 = ADD $1, $2, pcsections !0
  $6 = ADD $3, $4
  $7 = ADD $5, $6

Should `pcsections !0` in `$6` and `$7` be preserved? If so, probablly code to create new MachineInstr <https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/TargetInstrInfo.cpp#L871> should be updated.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D138107/new/

https://reviews.llvm.org/D138107