[llvm] ae4718a - [AMDGPU] Define and use UniformTernaryFrag. NFC.

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2022-11-14T15:15:03Z
New Revision: ae4718a2e4ccda6d76942e7bcb013359107a52d9

URL: https://github.com/llvm/llvm-project/commit/ae4718a2e4ccda6d76942e7bcb013359107a52d9
DIFF: https://github.com/llvm/llvm-project/commit/ae4718a2e4ccda6d76942e7bcb013359107a52d9.diff

LOG: [AMDGPU] Define and use UniformTernaryFrag. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.td
    llvm/lib/Target/AMDGPU/SOPInstructions.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
index c29e92efd596d..36ce845bab77c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td
@@ -623,12 +623,6 @@ def atomic_store_64_local_m0 : PatFrag<(ops node:$ptr, node:$val),
 } // End let IsAtomic = 1, AddressSpaces = StoreAddress_local.AddrSpaces
 
 
-def si_setcc_uniform : PatFrag <
-  (ops node:$lhs, node:$rhs, node:$cond),
-  (setcc node:$lhs, node:$rhs, node:$cond), [{
-  return !N->isDivergent();
-}]>;
-
 //===----------------------------------------------------------------------===//
 // SDNodes PatFrags for a16 loads and stores with 3 components.
 // v3f16/v3i16 is widened to v4f16/v4i16, so we need to match on the memory

diff  --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index 51dc41cc2b4da..674da1f0ae4a5 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -182,6 +182,18 @@ class UniformBinFrag<SDPatternOperator Op> : PatFrag <
   let GISelPredicateCode = [{return true;}];
 }
 
+class UniformTernaryFrag<SDPatternOperator Op> : PatFrag <
+  (ops node:$src0, node:$src1, node:$src2),
+  (Op $src0, $src1, $src2),
+  [{ return !N->isDivergent(); }]> {
+  // This check is unnecessary as it's captured by the result register
+  // bank constraint.
+  //
+  // FIXME: Should add a way for the emitter to recognize this is a
+  // trivially true predicate to eliminate the check.
+  let GISelPredicateCode = [{return true;}];
+}
+
 class DivergentBinFrag<SDPatternOperator Op> : PatFrag <
   (ops node:$src0, node:$src1),
   (Op $src0, $src1),
@@ -1024,7 +1036,7 @@ class SOPC_Base <RegisterOperand rc0, RegisterOperand rc1,
 class SOPC_Helper <RegisterOperand rc, ValueType vt,
                     string opName, SDPatternOperator cond> : SOPC_Base <
   rc, rc, opName,
-  [(set SCC, (si_setcc_uniform vt:$src0, vt:$src1, cond))] > {
+  [(set SCC, (UniformTernaryFrag<setcc> vt:$src0, vt:$src1, cond))] > {
 }
 
 class SOPC_CMP_32<string opName,