[PATCH] D138216: [AMDGPU] Intrinsic to expose s_wait_event for export ready
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 17 08:00:06 PST 2022
foad added a reviewer: AMDGPU.
foad added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsAMDGPU.td:2070
+def int_amdgcn_wait_event_export_ready :
+ Intrinsic<[], [], [IntrNoMem, IntrHasSideEffects, IntrWillReturn]
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Should this be int_amdgcn_s_wait_event_export_ready? I'm not sure how consistent we are about including the "s" or "v" prefix in intrinsic names.
================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:8375
Op->getOperand(2), Chain), 0);
+ case Intrinsic::amdgcn_wait_event_export_ready:
+ return SDValue(DAG.getMachineNode(AMDGPU::S_WAIT_EVENT, DL, MVT::Other,
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Why do you need this? Can't you do it with a tablegen selection pattern?
================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wait.event.ll:1
+; RUN: llc -march=amdgcn -verify-machineinstrs -mcpu=gfx1100 < %s | FileCheck -check-prefix=GCN %s
+
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Should test globalisel as well.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D138216/new/
https://reviews.llvm.org/D138216
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