[PATCH] D137936: [AArch64] Optimize cmp chain before legalization

[Allen zhong via Phabricator via llvm-commits]

Allen added a comment.

In D137936#3936125 <https://reviews.llvm.org/D137936#3936125>, @bcl5980 wrote:

> Maybe you still can try to enable the optimize before legalization to fix these issues like:
>
>   if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && isNullConstant(RHS) &&
>       LHS->getOpcode() == ISD::OR && LHS->hasOneUse() &&
>       isOrXorChain(LHS, NumXors, WorkList)) {
>     SDValue XOR0, XOR1;
>     std::tie(XOR0, XOR1) = WorkList[0];
>     SDValue Cmp = DAG.getSetCC(DL, VT, XOR0, XOR1, ISD::SETNE);
>     for (unsigned I = 1; I < WorkList.size(); I++) {
>       std::tie(XOR0, XOR1) = WorkList[I];
>       SDValue CmpChain = DAG.getSetCC(DL, VT, XOR0, XOR1, ISD::SETNE);
>       Cmp = DAG.getNode(ISD::OR, DL, VT, Cmp, CmpChain);
>     }
>   
>     // Exit early by inverting the condition, which help reduce indentations.
>     return DAG.getSetCC(DL, VT, Cmp, DAG.getConstant(0, DL, VT), Cond);
>   }
>
> After that you need remove `if (!DCI.isBeforeLegalize())` for `performOrXorChainCombine` and remove the function call in lowerSetCC to make the code cleaner.
> As @dmgreen mentioned before, maybe you can try to combine to `AArch64ISD::SUBS` + `AArch64ISD::CCMP`. But you may need to fix some type legalization issues to make it works.
> Current patch looks too specific, I think.

Thanks @bcl5980 for your idea, apply your comment.


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