[llvm] 0a33cee - [SLP]Fix a crash on analysis of the vectorized node.
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 15 13:41:18 PST 2022
Author: Alexey Bataev
Date: 2022-11-15T13:40:28-08:00
New Revision: 0a33ceee0105c94060c8a6089a2e489a8a7a5cb7
URL: https://github.com/llvm/llvm-project/commit/0a33ceee0105c94060c8a6089a2e489a8a7a5cb7
DIFF: https://github.com/llvm/llvm-project/commit/0a33ceee0105c94060c8a6089a2e489a8a7a5cb7.diff
LOG: [SLP]Fix a crash on analysis of the vectorized node.
Need to use advanced check for the same vectorized node to avoid
possible compiler crash. We may have 2 similar nodes (vector one and
gather) after graph nodes rotation, need to do extra checks for the
exact match.
Added:
llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Modified:
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index e89d25fd2d63..4b72f7914836 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -8137,17 +8137,17 @@ Value *BoUpSLP::vectorizeOperand(TreeEntry *E, unsigned NodeIdx) {
S = getSameOpcode(*It, *TLI);
}
if (S.getOpcode()) {
- if (TreeEntry *VE = getTreeEntry(S.OpValue); VE && VE->isSame(VL)) {
- assert((any_of(VE->UserTreeIndices,
- [E, NodeIdx](const EdgeInfo &EI) {
- return EI.EdgeIdx == NodeIdx && EI.UserTE == E;
- }) ||
- any_of(VectorizableTree,
- [E, NodeIdx, VE](const std::unique_ptr<TreeEntry> &TE) {
- return TE->isOperandGatherNode({E, NodeIdx}) &&
- VE->isSame(TE->Scalars);
- })) &&
- "Expected same vectorizable node.");
+ if (TreeEntry *VE = getTreeEntry(S.OpValue);
+ VE && VE->isSame(VL) &&
+ (any_of(VE->UserTreeIndices,
+ [E, NodeIdx](const EdgeInfo &EI) {
+ return EI.UserTE == E && EI.EdgeIdx == NodeIdx;
+ }) ||
+ any_of(VectorizableTree,
+ [E, NodeIdx, VE](const std::unique_ptr<TreeEntry> &TE) {
+ return TE->isOperandGatherNode({E, NodeIdx}) &&
+ VE->isSame(TE->Scalars);
+ }))) {
Value *V = vectorizeTree(VE);
if (VF != cast<FixedVectorType>(V->getType())->getNumElements()) {
if (!VE->ReuseShuffleIndices.empty()) {
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll b/llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
new file mode 100644
index 000000000000..c34a91f6be7c
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
@@ -0,0 +1,66 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -passes=slp-vectorizer -mtriple=x86_64-pc-windows-msvc19.16.0 < %s | FileCheck %s
+
+define void @test(ptr %a, ptr %b) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[RESULT:%.*]] = alloca [4 x [4 x float]], i32 0, align 4
+; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT: [[ARRAYIDX120:%.*]] = getelementptr [4 x float], ptr [[B:%.*]], i64 0, i64 3
+; CHECK-NEXT: [[TMP1:%.*]] = load <2 x float>, ptr [[ARRAYIDX120]], align 4
+; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <2 x float> [[TMP1]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[TMP3:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT: [[TMP4:%.*]] = load <2 x float>, ptr [[A:%.*]], align 4
+; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP2]], float [[TMP0]], i32 3
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x float> [[TMP5]], float [[TMP3]], i32 2
+; CHECK-NEXT: [[TMP7:%.*]] = fmul <4 x float> [[SHUFFLE]], [[TMP6]]
+; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x float> [[TMP7]], <4 x float> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
+; CHECK-NEXT: [[SHUFFLE2:%.*]] = shufflevector <4 x float> [[SHUFFLE]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+; CHECK-NEXT: [[TMP8:%.*]] = fmul <4 x float> [[SHUFFLE2]], zeroinitializer
+; CHECK-NEXT: [[TMP9:%.*]] = fadd <4 x float> [[SHUFFLE1]], [[TMP8]]
+; CHECK-NEXT: [[TMP10:%.*]] = fadd <4 x float> [[TMP9]], zeroinitializer
+; CHECK-NEXT: store <4 x float> [[TMP10]], ptr [[RESULT]], align 4
+; CHECK-NEXT: br label [[FOR_BODY]]
+;
+entry:
+ %result = alloca [4 x [4 x float]], i32 0, align 4
+ %arrayidx11 = getelementptr [4 x [4 x float]], ptr %b, i64 0, i64 1
+ %0 = load float, ptr %arrayidx11, align 4
+ %1 = load float, ptr null, align 4
+ %arrayidx120 = getelementptr [4 x float], ptr %b, i64 0, i64 3
+ %2 = load float, ptr %arrayidx120, align 4
+ br label %for.body
+
+for.body:
+ %3 = load float, ptr %a, align 4
+ %mul = fmul float %3, 0.000000e+00
+ %arrayidx9 = getelementptr [4 x [4 x float]], ptr %a, i64 0, i64 0, i64 1
+ %4 = load float, ptr %arrayidx9, align 4
+ %mul13 = fmul float %4, %0
+ %add = fadd float %mul, %mul13
+ %add22 = fadd float %add, 0.000000e+00
+ store float %add22, ptr %result, align 4
+ %5 = load float, ptr null, align 4
+ %mul43 = fmul float %3, %5
+ %mul51 = fmul float %4, 0.000000e+00
+ %add52 = fadd float %mul43, %mul51
+ %add61 = fadd float %add52, 0.000000e+00
+ %arrayidx74 = getelementptr [4 x [4 x float]], ptr %result, i64 0, i64 0, i64 1
+ store float %add61, ptr %arrayidx74, align 4
+ %mul82 = fmul float %3, 0.000000e+00
+ %mul90 = fmul float %4, %1
+ %add91 = fadd float %mul82, %mul90
+ %add100 = fadd float %add91, 0.000000e+00
+ %arrayidx113 = getelementptr [4 x [4 x float]], ptr %result, i64 0, i64 0, i64 2
+ store float %add100, ptr %arrayidx113, align 4
+ %mul121 = fmul float %3, %2
+ %mul129 = fmul float %4, 0.000000e+00
+ %add130 = fadd float %mul121, %mul129
+ %add139 = fadd float %add130, 0.000000e+00
+ %arrayidx152 = getelementptr [4 x [4 x float]], ptr %result, i64 0, i64 0, i64 3
+ store float %add139, ptr %arrayidx152, align 4
+ br label %for.body
+}
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