[PATCH] D136169: [AMDGPU] Avoid SCC clobbering before S_CSELECT_B32

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2261
+                BuildMI(*MBB, std::next(MI), DL, TII->get(AMDGPU::S_SUBB_U32),
+                        TmpSReg)
+                    .addReg(FrameReg)
----------------
The bitcmp1/bitset0 trick only works with addc. It doesn't work with subb, because if scc is set then the result will be 1 *less* than you wanted, so bitset0 will not correct it.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136169/new/

https://reviews.llvm.org/D136169