[llvm] 4695f59 - [X86] Remove unnecessary SHLD32rri8/SHRD16rri8 instruction override from bdver2 model

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-11-20T14:17:44Z
New Revision: 4695f5982a9da45dcb89ce013f92bb898c6292b6

URL: https://github.com/llvm/llvm-project/commit/4695f5982a9da45dcb89ce013f92bb898c6292b6
DIFF: https://github.com/llvm/llvm-project/commit/4695f5982a9da45dcb89ce013f92bb898c6292b6.diff

LOG: [X86] Remove unnecessary SHLD32rri8/SHRD16rri8 instruction override from bdver2 model

Reported by D138359 - the override matches the WriteSHDrri base sched def

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ScheduleBdVer2.td

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ScheduleBdVer2.td b/llvm/lib/Target/X86/X86ScheduleBdVer2.td
index 184f4de5c71a..942ef5965833 100644
--- a/llvm/lib/Target/X86/X86ScheduleBdVer2.td
+++ b/llvm/lib/Target/X86/X86ScheduleBdVer2.td
@@ -710,13 +710,6 @@ def : InstRW<[PdWriteRCL8ri], (instrs RCL8ri)>;
 defm : PdWriteRes<WriteSHDrri,       [PdEX01],         3, [6], 6>;
 defm : PdWriteRes<WriteSHDrrcl,      [PdEX01],         3, [8], 7>;
 
-def PdWriteSHLD32rri8SHRD16rri8 : SchedWriteRes<[PdEX01]> {
-  let Latency = 3;
-  let ResourceCycles = [6];
-  let NumMicroOps = 6;
-}
-def : InstRW<[PdWriteSHLD32rri8SHRD16rri8 ], (instrs SHLD32rri8, SHRD16rri8)>;
-
 def PdWriteSHLD16rrCLSHLD32rrCLSHRD32rrCL : SchedWriteRes<[PdEX01]> {
   let Latency = 3;
   let ResourceCycles = [6];