[PATCH] D138097: [BOLT][AArch64] Handle adrp+ld64 linker relaxations
Vladislav Khmelevsky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 16 00:06:13 PST 2022
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Linker might relax adrp + ldr got address loading to adrp + add for
local non-preemtable symbols (e.g. hiddeng/protected/symbols in
executable). As usually linker doesn't change relocations properly after
releaxation, so we have to handle such cases by ourselves. To do that
during relocations reading we change LD64 reloc to ADD if instruction
missmatch found and introduce FixRelaxationPass that founds ADRP+ADD
pairs and after perfoming some checks we're replacing ADRP target symbol
to already fixed ADDs one.
Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D138097
Files:
bolt/include/bolt/Core/MCPlusBuilder.h
bolt/include/bolt/Core/Relocation.h
bolt/include/bolt/Passes/FixRelaxationPass.h
bolt/include/bolt/Rewrite/RewriteInstance.h
bolt/lib/Core/Relocation.cpp
bolt/lib/Passes/CMakeLists.txt
bolt/lib/Passes/FixRelaxationPass.cpp
bolt/lib/Rewrite/BinaryPassManager.cpp
bolt/lib/Rewrite/RewriteInstance.cpp
bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
bolt/test/AArch64/Inputs/got-ld64-relaxation.yaml
bolt/test/AArch64/got-ld64-relaxation.test
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