[PATCH] D137571: [AArch64] Add all SME2.1 instructions Assembly/Disassembly

Caroline via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 14 01:51:34 PST 2022


CarolineConcatto marked 2 inline comments as done.
CarolineConcatto added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td:796
+
+let Predicates = [HasSME2p1, HasSMEF16F16] in {
+defm FADD_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"fadd", 0b0100, MatrixOp16, ZZ_h_mul_r>;
----------------
paulwalker-arm wrote:
> Is it correct to require `SME2p1` in order to allow `SMEF16F16`?  The documentation suggests `FEAT_SME_F16F16` is read independently of other feature flags.  Perhaps requiring `SME2` is a better base requirement as this is the feature that added the core support for these instructions.
I had this conversation before posting the patches upstream. The developer's page is not clear, but it was agreed that these instructions are optional for sme2p1.



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  https://reviews.llvm.org/D137571/new/

https://reviews.llvm.org/D137571



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