The Week Of Monday 31 July 2023 Archives by author

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Starting: Mon Jul 31 00:03:11 PDT 2023
Ending: Sun Aug 6 23:40:32 PDT 2023
Messages: 2363

• [PATCH] D155662: [X86] Promote VAES, SHA512, SM4 implied feature to AVX2   Freddy, Ye via Phabricator via llvm-commits
• [llvm] 80e80fa - Remove stale info and fix superscript numbering   Aaron Ballman via llvm-commits
• [llvm] abb09a6 - Fix LLVM Sphinx build   Aaron Ballman via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.5   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.5   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156798: Check if directory before opening file   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156654: [bazel] Update example workspace files with dependencies   Aaron Siddhartha Mondal via Phabricator via llvm-commits
• [PATCH] D157091: AMDGPU/Uniformity/GlobalISel: G_AMDGPU atomics are always divergent   Acim Maravic via Phabricator via llvm-commits
• [PATCH] D154958: [RISCV][MC] Relax conditional branches to unresolved symbols   Aditya Kumar via Phabricator via llvm-commits
• [PATCH] D156651: [llvm][Bazel] Split lit target into lit_lib and lit   Adrian Kuegel via Phabricator via llvm-commits
• [llvm] ea90e28 - Fix typo   Adrian Prantl via llvm-commits
• [PATCH] D157036: Emit a .debug_str_offsets section with dsymutil to support DW_FORM_strx in dsymutil.   Adrian Prantl via Phabricator via llvm-commits
• [llvm] c402498 - [Docs][llvm-link] Add documentation an CLI options   Aiden Grossman via llvm-commits
• [llvm] 43b8e86 - [llvm-exegesis] enable memory annotation and subprocess tests   Aiden Grossman via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D156654: [bazel] Update example workspace files with dependencies   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D154680: [llvm-exegesis] Make SubprocessMemoryTest use PIDs   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D156654: [bazel] Update example workspace files with dependencies   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D109661: [FunctionPropertiesAnalysis] Add `PreciseFunctionPropertiesAnalysis`   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Aiden Grossman via Phabricator via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Aiden Grossman via Phabricator via llvm-commits
• [llvm] 1e92e25 - [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [llvm] 6eb2c17 - [NFC][GuardWidening] Remove dead code   Aleksandr Popov via llvm-commits
• [PATCH] D156908: [NFC][GuardWidening] Remove dead code   Aleksandr Popov via Phabricator via llvm-commits
• [PATCH] D156908: [NFC][GuardWidening] Remove dead code   Aleksandr Popov via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Alessandro Decina via Phabricator via llvm-commits
• [PATCH] D157112: [libc] Define long long limits if not defined   Alex Brachet via Phabricator via llvm-commits
• [PATCH] D157112: [libc] Define long long limits if not defined   Alex Brachet via Phabricator via llvm-commits
• [llvm] fdac86c - [RISCV][test] Add atomicrmw test cases for suboptimal codegen report in #64090   Alex Bradbury via llvm-commits
• [llvm] bc2ea02 - [RISCV][test] Add 'atomicrmw xchg a, -1' tests in preparation for D156801   Alex Bradbury via llvm-commits
• [llvm] be0dac2 - [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'   Alex Bradbury via llvm-commits
• [llvm] 8acb8a1 - [RISCV] Make Zcf and Zcd imply the F and D extensions respectively   Alex Bradbury via llvm-commits
• [llvm] 6676027 - [RISCV] Implement support for bf16 select when zfbfmin is enabled   Alex Bradbury via llvm-commits
• [llvm] 8a71f44 - [RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps   Alex Bradbury via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156590: [RISCV] Add a common base class for RVInstR variations. NFC   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, 0'   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156810: [RISCV] Call combineSelectToBinOp before generic select expansion for Zicond.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156314: [RISCV] Make Zcf and Zcd imply the F and D extensions respectively   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156883: [RISCV] Implement support for bf16 selects when zfbfmin is enabled   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156895: [RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156883: [RISCV] Implement support for bf16 selects when zfbfmin is enabled   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156895: [RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156929: [RISCV] Merge fp-imm.ll and zfh-imm.ll into float/double/half-imm.ll. NFC   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156943: [RISCV] Implement straight-forward bf16<->int conversion cases   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156944: [TargetLowering][RISCV] Improve codegen for saturing bf16 to int conversion   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156895: [RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156974: [RISCV] Fix the predicate code of uimm6   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156943: [RISCV] Implement straight-forward bf16<->int conversion cases   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156990: [LegalizeTypes][RISCV] Support libcalls for fpto{s,u}i of bfloat by extending to f32 first   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D157122: [lldb] Remove support for SBHostOS threading functionality   Alex Langford via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU] Add target features for GDS and GWS   Alex Voicu via Phabricator via llvm-commits
• [PATCH] D155856: [LLVM][Opt][RFC] Add LLVM support for C++ Parallel Algorithm Offload   Alex Voicu via Phabricator via llvm-commits
• [PATCH] D155775: [Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload   Alex Voicu via Phabricator via llvm-commits
• [PATCH] D150880: [RFC, FileCheck, 3/4] Allow AP value for numeric expressions   Alexander Richardson via Phabricator via llvm-commits
• [PATCH] D157204: [MLIR][Math] Add support for f16 in the expansion of math.roundeven   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D157204: [MLIR][Math] Add support for f16 in the expansion of math.roundeven   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D157204: [MLIR][Math] Add support for f16 in the expansion of math.roundeven   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D157204: [MLIR][Math] Add support for f16 in the expansion of math.roundeven   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling of inlined subroutine with no output PC   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling of inlined subroutine with no output PC   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156765: [BOLT][DWARF] Opt out test from aarch64.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156765: [BOLT][DWARF] Opt out test from aarch64   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156957: [BOLT][DWARF] Delete DW_AT_low_pc when converting to ranges.   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix handling CU with DW_AT_ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix handling CU with DW_AT_ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix setting DW_AT_ranges offset of Skeleton CU   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix setting DW_AT_ranges offset of Skeleton CU   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix setting DW_AT_ranges offset of Skeleton CU   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156957: [BOLT][DWARF] Delete DW_AT_low_pc when converting to ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix setting DW_AT_ranges offset of Skeleton CU   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D157136: [LLD][COFF] Handle 'label' symbols when they point to a COMDAT section   Alexandre Ganea via Phabricator via llvm-commits
• [llvm] 893d3a6 - Reland [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via llvm-commits
• [llvm] 5bfefff - Reland [FuncSpec] Split the specialization bonus into CodeSize and Latency.   Alexandros Lamprineas via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156903: [FuncSpec] Estimate dead blocks more accurately.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156903: [FuncSpec] Estimate dead blocks more accurately.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D157123: [FuncSpec] Rework the discardment logic for unprofitable specializations.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D157123: [FuncSpec] Rework the discardment logic for unprofitable specializations.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Alexei Starovoitov via Phabricator via llvm-commits
• [llvm] 1a1a684 - [StripDeadDebugInfo] Drop dead CUs for const global expression   Alexey Bader via llvm-commits
• [PATCH] D131179: [StripDeadDebugInfo] Drop dead CUs for const global expression   Alexey Bader via Phabricator via llvm-commits
• [llvm] 85635c7 - [SLP][NFC]Use ScalarTy consistently in getEntryCost, NFC.   Alexey Bataev via llvm-commits
• [llvm] 662efde - [SLP][NFC]Improve handling of MinBWs container, NFC.   Alexey Bataev via llvm-commits
• [llvm] 0a68cd2 - [SLP]Fix PR64252: Requesting cost of invalid extending instruction.   Alexey Bataev via llvm-commits
• [llvm] f5edeb2 - [SLP][NFC]Add SVML vectorization tests, NFC.   Alexey Bataev via llvm-commits
• [llvm] 58b0d7c - [SLP]Improve stores vectorization.   Alexey Bataev via llvm-commits
• [llvm] 2f6ca38 - Revert "[SLP]Improve stores vectorization."   Alexey Bataev via llvm-commits
• [llvm] 58066ed - [SLP]Improve stores vectorization.   Alexey Bataev via llvm-commits
• [llvm] 48bcaeb - Revert "[SLP]Improve stores vectorization."   Alexey Bataev via llvm-commits
• [PATCH] D154738: [SLP]Introduce isLegalVectorOp to check if the vector instruction is going to be scalarized.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D155246: [SLP]Improve stores vectorization.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D154738: [SLP]Introduce isLegalVectorOp to check if the vector instruction is going to be scalarized.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D154738: [SLP]Introduce isLegalVectorOp to check if the vector instruction is going to be scalarized.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D157009: [SLP]Fix PR63854: Add proper sorting of pointers for masked stores.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D155246: [SLP]Improve stores vectorization.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D157009: [SLP]Fix PR63854: Add proper sorting of pointers for masked stores.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D153268: [DWARFLinkerParallel] Add limited functionality to DWARFLinkerParallel.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D153268: [DWARFLinkerParallel] Add limited functionality to DWARFLinkerParallel.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D154793: [DWARFLinkerParallel] Add support of accelerator tables to DWARFLinkerParallel.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D157036: Emit a .debug_str_offsets section with dsymutil to support DW_FORM_strx in dsymutil.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D156798: Check if directory before opening file   Alison Zhang via Phabricator via llvm-commits
• [PATCH] D151567: [LLVM][Support] Report EISDIR when opening a directory on AIX   Alison Zhang via Phabricator via llvm-commits
• [PATCH] D151567: [LLVM][Support] Report EISDIR when opening a directory on AIX   Alison Zhang via Phabricator via llvm-commits
• [PATCH] D151567: [LLVM][Support] Report EISDIR when opening a directory on AIX   Alison Zhang via Phabricator via llvm-commits
• [PATCH] D156591: [tests] precommit tests for D154953   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156591: [tests] precommit tests for D154953   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156845: [ConstantRange] Calculate precise range for shl by -1   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156865: [tests] precommit tests for D156845   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156845: [ConstantRange] Calculate precise range for shl by -1   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the isNonNegative for Power2 value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the isNonNegative for Power2 value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156521: [tests] precommit tests for D156499   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D157062: [ValueTracking] Improve the coverage of isKnownToBeAPowerOfTwo for vscale   Allen zhong via Phabricator via llvm-commits
• [PATCH] D157062: [ValueTracking] Improve the coverage of isKnownToBeAPowerOfTwo for vscale   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156845: [ConstantRange] Calculate precise range for shl by -1   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156845: [ConstantRange] Calculate precise range for shl by -1   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154922: [BOLT] fix the endless loop of --iterative-guess   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D157187: [InstCombine] Propagate the nuw/nsw for instruction neg-sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156521: [tests] precommit tests for D156499   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156521: [tests] precommit tests for D156499   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D157187: [InstCombine] Propagate the nuw/nsw for instruction neg-sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D157187: [InstCombine] Propagate the nuw/nsw for instruction neg-sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D155790: PreISelIntrinsicLowering: don't expand memcpys in minsize functions, even with no-builtins.   Amara Emerson via Phabricator via llvm-commits
• [PATCH] D155790: PreISelIntrinsicLowering: don't expand memcpys in minsize functions, even with no-builtins.   Amara Emerson via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle sequences of trunc(sext/zext/anyext...) in artifact combiner   Amara Emerson via Phabricator via llvm-commits
• [PATCH] D154522: [DAG] Improve combineCarryDiamond to accept (uaddo_carry X, 0, Carry)   Amaury SECHET via Phabricator via llvm-commits
• [PATCH] D156697: [BOLT] Split missed macro-fusion counting around removeConditionalTailCalls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156644: [BOLT][YAML] Only read first profile per function   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Fix instrumenting conditional tail calls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D154749: [BOLT][NFC] Simplify DataAggregator/YAMLProfileReader   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D154749: [BOLT][NFC] Simplify DataAggregator   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156340: [BOLT][test] Add missing stderr redirections   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156765: [BOLT][DWARF] Opt out test from aarch64.   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156765: [BOLT][DWARF] Opt out test from aarch64   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156278: [BOLT] Fine-tuning hash computation for stale matching   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156018: [BOLT] Impl createRelocation for AArch64   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant globals into one pool.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156784: [AArch64][PAC] Declare FPAC subtarget feature   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156785: [AArch64][PAC] Skip checking LR during tail call if FPAC is enabled   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156530: [MISched] Do not erase resource booking history for subunits.   Andrea Di Biagio via Phabricator via llvm-commits
• [PATCH] D156758: [dsymutil][dwp][libtool-darwin][sancov] Enable llvm-driver   Andres Villegas via Phabricator via llvm-commits
• [PATCH] D156758: [dsymutil][dwp][libtool-darwin][sancov] Enable llvm-driver   Andres Villegas via Phabricator via llvm-commits
• [PATCH] D156758: [dwp][libtool-darwin][sancov] Enable llvm-driver   Andres Villegas via Phabricator via llvm-commits
• [PATCH] D156758: [dwp][libtool-darwin][sancov] Enable llvm-driver   Andres Villegas via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Andrew Werner via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156517: [mlir][ArmSME] Add -canonicalize to vector to ArmSME test   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156701: [mlir][ArmSME] Use vector.reduction add in zero test   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156558: [mlir][ArmSME] Remove "pure" side-effect from 'get_tile_id' op to prevent CSE   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D149055: [llvm][TableGen][Jupyter] Add configurable default reset behaviour   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156802: [mlir][ArmSME] Split lowering of arith.constant from vector.transfer_write   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D149055: [llvm][TableGen][Jupyter] Add configurable default reset behaviour   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156954: [lit] Improve test output from lit's internal shell   Andrzej Warzynski via Phabricator via llvm-commits
• [llvm] 668e33c - [dwp][libtool-darwin][sancov] Enable llvm-driver   Andrés Villegas via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Andy Kaylor via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D156963: [X86] Workaround possible CPUID bug in Sandy Bridge.   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156862: [InstCombine] Test cases for D156811   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156862: [InstCombine] Test cases for D156811   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Antonio Frighetto via Phabricator via llvm-commits
• [llvm] 955fc63 - [llvm-c] Add LLVMSetTailCallKind and LLVMGetTailCallKind   Arthur Eubanks via llvm-commits
• [PATCH] D153107: [llvm-c] Add LLVMSetTailCallKind and LLVMGetTailCallKind   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D157020: [WIP][lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D157020: [WIP][lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D157020: [WIP][lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D139074: Vectorization Of Conditional Statements Using BOSCC   Ashutosh Nema via Phabricator via llvm-commits
• [lld] 06e8dd2 - [lld] fix new test from ca35a19acab1 to work with read-only source trees   Augie Fackler via llvm-commits
• [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already   Austin Kerbow via Phabricator via llvm-commits
• [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments   Austin Kerbow via Phabricator via llvm-commits
• [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments   Austin Kerbow via Phabricator via llvm-commits
• [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments   Austin Kerbow via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157037: [VPlan] Create mask for tail-folding up-front (NFCI).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157039: [VPlan] Add VPlan::hasTailFolded.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157144: [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D157194: [VPlan] Model wrap flags directly, remove *NUW opcodes (NFC)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155398: Linker is unable to find -lclang_rt.builtins-riscv64 library   Ayonam Ray via Phabricator via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   Ben Langmuir via Phabricator via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   Ben Langmuir via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option spelling at compile-time   Ben Langmuir via Phabricator via llvm-commits
• [llvm] 80cd505 - [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via llvm-commits
• [llvm] f94e9bd - [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Ben Shi via llvm-commits
• [llvm] 75c3c6a - [CSKY] Optimize 'llvm.cttz.i32' and 'llvm.ctlz.i32'   Ben Shi via llvm-commits
• [llvm] 528831d - [CSKY] Optimize ANDI/ORI to BSETI/BCLRI for specific immediates   Ben Shi via llvm-commits
• [llvm] eac78fd - [CSKY][test][NFC] Add tests of conditional branch and value select   Ben Shi via llvm-commits
• [llvm] a133fb2 - [CSKY][NFC] Fix broken tests in eac78fdf68f58e113b2cf18a14baccb8f5ebcf50   Ben Shi via llvm-commits
• [PATCH] D153614: [CSKY] Optimize ANDI/ORI to BCLRI/BSETI for specific immediates   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154767: [CSKY][test][NFC] Add more tests of conditional branch and value select   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156780: [CSKY] Optimize 'llvm.cttz.i32' and 'llvm.ctlz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156780: [CSKY] Optimize 'llvm.cttz.i32' and 'llvm.ctlz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156780: [CSKY] Optimize 'llvm.cttz.i32' and 'llvm.ctlz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156780: [CSKY] Optimize 'llvm.cttz.i32' and 'llvm.ctlz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D153614: [CSKY] Optimize ANDI/ORI to BCLRI/BSETI for specific immediates   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154767: [CSKY][test][NFC] Add more tests of conditional branch and value select   Ben Shi via Phabricator via llvm-commits
• [PATCH] D157098: [VectorCombine][NFC][test] Add tests for the 'foldSingleElementStore' transform   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI   Ben Shi via Phabricator via llvm-commits
• [PATCH] D157098: [VectorCombine][NFC][test] Add tests for the 'foldSingleElementStore' transform   Ben Shi via Phabricator via llvm-commits
• [PATCH] D157098: [VectorCombine][NFC][test] Add tests for the 'foldSingleElementStore' transform   Ben Shi via Phabricator via llvm-commits
• [PATCH] D157098: [VectorCombine][NFC][test] Add tests for the 'foldSingleElementStore' transform   Ben Shi via Phabricator via llvm-commits
• [llvm] 502280e - [Verifier] Pass raw_ostream as pointer instead of reference   Benjamin Kramer via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155417: [DominanceFrontier] fix addToFrontier to use insert   Bing Yu via Phabricator via llvm-commits
• [llvm] 6ee497a - [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing1 Yu via llvm-commits
• [llvm] 8b9c412 - [DominanceFrontier] fix addToFrontier to use insert   Bing1 Yu via llvm-commits
• [llvm] 5fbee1c - [PassRegistry] Add verify-fixpoint to instcombine parameter string   Bjorn Pettersson via llvm-commits
• [llvm] fd05c34 - Stop using legacy helpers indicating typed pointer types. NFC   Bjorn Pettersson via llvm-commits
• [llvm] 408cc94 - [LV][LSV][SLP] Drop some typed pointer bitcasts   Bjorn Pettersson via llvm-commits
• [llvm] e6e9a87 - Drop some typed pointer handling   Bjorn Pettersson via llvm-commits
• [llvm] 4ce7c4a - [llvm] Drop some typed pointer handling/bitcasts   Bjorn Pettersson via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156733: Stop using legacy helpers indicating typed pointer types. NFC   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156733: Stop using legacy helpers indicating typed pointer types. NFC   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156736: [LV][LSV][SLP] Drop some typed pointer bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D154680: [llvm-exegesis] Make SubprocessMemoryTest use PIDs   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156739: Drop some typed pointer handling   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156741: [IR] Remove no longer used methods for getting typed pointer types   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156733: Stop using legacy helpers indicating typed pointer types. NFC   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156736: [LV][LSV][SLP] Drop some typed pointer bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156739: Drop some typed pointer handling   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156911: [clang][CodeGen] Drop some typed pointer bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156911: [clang][CodeGen] Drop some typed pointer bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D157016: [llvm] Drop some typed pointer handling/bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156990: [LegalizeTypes][RISCV] Support libcalls for fpto{s,u}i of bfloat by extending to f32 first   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D156911: [clang][CodeGen] Drop some typed pointer bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D157016: [llvm] Drop some typed pointer handling/bitcasts   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D148854: [llvm-stress] Switch to a FuzzMutate driver   Bjorn Pettersson via Phabricator via llvm-commits
• [compiler-rt] 11b7ce2 - [ASanStableABI][Driver] Stop linking to asan dylib when stable abi is enabled   Blue Gaston via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156846: [RISCV] Add CFI information for vector callee-saved registers   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156974: [RISCV] Fix the predicate code of uimm6   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156984: [RISCV][NFC] Remove unused code in RISCV/RISCVInstrInfoZvk.td   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156974: [RISCV] Fix the predicate code of uimm6   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156984: [RISCV][NFC] Remove unused code in RISCV/RISCVInstrInfoZvk.td   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D157067: [RISCV] Set the vector calling convention if any of input type or return type is vector   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU][RFC] Add a target feature for GDS   Brian Sumner via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU][RFC] Add a target feature for GDS   Brian Sumner via Phabricator via llvm-commits
• [PATCH] D156872: [MachineVerifier] Verify LiveIntervals for PHIs   Carl Ritson via Phabricator via llvm-commits
• [PATCH] D156872: [MachineVerifier] Verify LiveIntervals for PHIs   Carl Ritson via Phabricator via llvm-commits
• [PATCH] D156872: [MachineVerifier] Verify LiveIntervals for PHIs   Carl Ritson via Phabricator via llvm-commits
• [PATCH] D157086: [LiveRange] Remove inaccurate verification of live-in PhysRegs   Carl Ritson via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155879: Summary: [asan][win][msvc] override new and delete and seperate TUs   Charlie Barto via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   ChenZheng via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   ChenZheng via Phabricator via llvm-commits
• [PATCH] D156292: [PowerPC] Support initial-exec TLS relocation on AIX   ChenZheng via Phabricator via llvm-commits
• [compiler-rt] 2fcfaee - Revert "[scudo] seperate cache retrieval logic"   Chia-hung Duan via llvm-commits
• [compiler-rt] aeef9c0 - [scudo] CanCache should use Size + HeadersSize instead of RoundedSize   Chia-hung Duan via llvm-commits
• [compiler-rt] e010537 - [scudo] Skip visiting all free blocks if grouping is disabled   Chia-hung Duan via llvm-commits
• [compiler-rt] aaf1149 - [scudo] Respect the return value of ReservedMemory::create() (NFC)   Chia-hung Duan via llvm-commits
• [compiler-rt] 3ef766a - [scudo] Specify memory order while using atomic_compare_exchange   Chia-hung Duan via llvm-commits
• [llvm] ee2168a - [NFC] Fixing code formatting   Chris Bieneman via llvm-commits
• [PATCH] D156814: [NFC] Refactor byteswapped writes   Chris Bieneman via Phabricator via llvm-commits
• [PATCH] D156814: [NFC] Refactor byteswapped writes   Chris Bieneman via Phabricator via llvm-commits
• [PATCH] D157240: [NFC][xray] Fix enable_if usage in XRay.h   Chris Cotter via Phabricator via llvm-commits
• [PATCH] D157240: [NFC][xray] Fix enable_if usage in XRay.h   Chris Cotter via Phabricator via llvm-commits
• [PATCH] D57896: Variable names rule   Chris Lattner via Phabricator via llvm-commits
• [PATCH] D156347: [InstCombine] Tests for D156026 (Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer))   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156347: [InstCombine] Tests for D156026 (Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer))   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156301: [AMDGPU] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Christudasan Devadasan via Phabricator via llvm-commits
• [llvm] 9b69a4d - Revert "[Coroutines] Add an O(n) algorithm for computing the cross suspend point"   Chuanqi Xu via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D156903: [FuncSpec] Estimate dead blocks more accurately.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D157070: [C++20] [Coroutines] Introduce `@llvm.coro.opt.blocker` to block the may-be-incorrect optimization for awaiter   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D157070: [C++20] [Coroutines] Introduce `@llvm.coro.opt.blocker` to block the may-be-incorrect optimization for awaiter   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D157070: [C++20] [Coroutines] Introduce `@llvm.coro.opt.blocker` to block the may-be-incorrect optimization for awaiter   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D157070: [C++20] [Coroutines] Introduce `@llvm.coro.opt.blocker` to block the may-be-incorrect optimization for awaiter   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D157123: [FuncSpec] Rework the discardment logic for unprofitable specializations.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D140828: [C++] Implement "Deducing this" (P0847R7)   Corentin Jabot via Phabricator via llvm-commits
• [llvm] f92dc10 - [RISCV] Add a common base class for RVInstI variations. NFC   Craig Topper via llvm-commits
• [llvm] fb97316 - [RISCV] Add a common base class for RVInstR variations. NFC   Craig Topper via llvm-commits
• [llvm] 048458f - [RISCV] Add no NaN support to lowerFMAXIMUM_FMINIMUM.   Craig Topper via llvm-commits
• [llvm] 5a51996 - [RISCV] Call combineSelectToBinOp before generic select expansion for Zicond.   Craig Topper via llvm-commits
• [llvm] de7fa3a - [RISCV] Copy memoperands in some of the post isel peepholes.   Craig Topper via llvm-commits
• [llvm] d8f9663 - [RISCV] Rename RISCVISD::FMINNUM_VL/FMAXNUM_VL to VFMIN_VL/VFMAX_VL. NFC   Craig Topper via llvm-commits
• [llvm] c1c5da8 - [RISCV] Merge fp-imm.ll and zfh-imm.ll into float/double/half-imm.ll. NFC   Craig Topper via llvm-commits
• [llvm] 2a5e3f4 - [X86] Workaround possible CPUID bug in Sandy Bridge.   Craig Topper via llvm-commits
• [llvm] a8c502a - [RISCV] Add bf16 to isFPImmLegal.   Craig Topper via llvm-commits
• [llvm] 40f3708 - [RISCV] Add a test case that would have failed before D156974. NFC   Craig Topper via llvm-commits
• [llvm] 8142501 - [RISCV] Add vector legalization for fmaximum/fminimum.   Craig Topper via llvm-commits
• [llvm] 4400018 - [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.   Craig Topper via llvm-commits
• [llvm] f36bbb0 - [RISCV] Use static_assert to check ranges in hasMergeOp and hasMaskOp.   Craig Topper via llvm-commits
• [llvm] c15e7bb - [RISCV] Add explicit i64 to an isel pattern that is only valid for RV64. NFC   Craig Topper via llvm-commits
• [llvm] 69b19f2 - [RISCV] Use i64 instead of XLenVT in RV64 only patterns. NFC   Craig Topper via llvm-commits
• [llvm] a3a7e76 - [SelectionDAG] Add Opc_CheckPatternPredicate2 to support targets with more than 256 predicates.   Craig Topper via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155041: [RISCV] Remove unnecessary move of undefined with subregister liveness enabled   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156685: [RISCV] Match ext_vl + ext_vl + srem + trunc_vl to vrem.vv   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156477: [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156685: [RISCV] Match ext_vl + ext_vl + srem + trunc_vl to vrem.vv   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156646: [RISCV] Expand load extension / truncate store for bf16   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156646: [RISCV] Expand load extension / truncate store for bf16   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156709: [RISCVRVVInitUndef] Ignore tied use for partial undef register   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156432: [RISCV][NFC] Use !format to simplify some code   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156590: [RISCV] Add a common base class for RVInstR variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156249: [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156748: [RISCV] Add nonans FMF support to lowerFMAXIMUM_FMINIMUM.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156748: [RISCV] Add nonans FMF support to lowerFMAXIMUM_FMINIMUM.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, 0'   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156748: [RISCV] Add no NaN support to lowerFMAXIMUM_FMINIMUM.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156432: [RISCV][NFC] Use !format to simplify some code   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156810: [RISCV] Call combineSelectToBinOp before generic select expansion for Zicond.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156810: [RISCV] Call combineSelectToBinOp before generic select expansion for Zicond.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156801: [RISCV] Improve codegen for i8/i16 'atomicrmw xchg a, {0,-1}'   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156830: [RISCV] Copy memoperands in some of the post isel peepholes.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to custom lowered instruction   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen][NFC] Refine obtaining qualified register class ids.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156851: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156851: [RISCV] Merge rv32 and rv64 Zvb* intrinsic tests. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156830: [RISCV] Copy memoperands in some of the post isel peepholes.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156349: [DAG] Support store merging of vector constant stores   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156863: [RISCV] Teach lowerScalarInsert to handle scalar value is the first element of a fixed vector.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156915: [RISCV] Add VP patterns for vwsll.[vv,vx,vi]   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156883: [RISCV] Implement support for bf16 selects when zfbfmin is enabled   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156895: [RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156909: [RISCV] Use NoReg in place of IMPLICIT_DEF for undefined passthru operands   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156929: [RISCV] Merge fp-imm.ll and zfh-imm.ll into float/double/half-imm.ll. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156895: [RISCV] Expand test coverage of bf16 operations with Zfbfmin and fix gaps   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156937: [RISCV] Add vector legalization for fmaximum/fminimum.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156929: [RISCV] Merge fp-imm.ll and zfh-imm.ll into float/double/half-imm.ll. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156963: [X86] Workaround possible CPUID bug in Sandy Bridge.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156963: [X86] Workaround possible CPUID bug in Sandy Bridge.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156963: [X86] Workaround possible CPUID bug in Sandy Bridge.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156967: [PoC][SelectionDAG] Upgrade the MatcherTable type from unsigned char to unsigned short   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156943: [RISCV] Implement straight-forward bf16<->int conversion cases   Craig Topper via Phabricator via llvm-commits
• [PATCH] D152754: [PowerPC] Correct missue of getOperandConstraint in PPCInstrInfo::commuteInstructionImpl   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156963: [X86] Workaround possible CPUID bug in Sandy Bridge.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156967: [SelectionDAG] Encode CheckPatternPredicate num in VBR format to expand the range it can represents   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156974: [RISCV] Fix the predicate code of uimm6   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157017: [RISCV][GlobalISel] Legalize logical instructions for nonpow 2 types   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157019: [RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156974: [RISCV] Fix the predicate code of uimm6   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157077: [RISCV] Teach VSETVLIInserter to not demand tail policy when there is no tail element   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156937: [RISCV] Add vector legalization for fmaximum/fminimum.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157023: [RISCV][GlobalISel] Legalize G_ICMP and G_SELECT   Craig Topper via Phabricator via llvm-commits
• [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157023: [RISCV][GlobalISel] Legalize G_ICMP and G_SELECT   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157172: [AArch64] Narrow G_SEXT_INREG to s64 before lowering.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157132: [RISCVGatherScatterLowering] Support broadcast base pointer   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157120: [RISCV] Use v(f)slide1down for build_vector with dominant values   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156944: [TargetLowering][RISCV] Improve codegen for saturating bf16 to int conversion   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157176: [RISCV] Refactor to reduce some duplication in RISCVInstrInfoV.td. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156967: [SelectionDAG] Encode CheckPatternPredicate num in VBR format to expand the range it can represents   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157196: [SelectionDAG] Add Opc_CheckPatternPredicate2 to support targets with more than 256 predicates.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156967: [SelectionDAG] Encode CheckPatternPredicate num in VBR format to expand the range it can represents   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157196: [SelectionDAG] Add Opc_CheckPatternPredicate2 to support targets with more than 256 predicates.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D157250: [RISCV] Enable alias analysis by default   Craig Topper via Phabricator via llvm-commits
• [llvm] ce6303f - [lli] Fix crash on empty entry-function   Cullen Rhodes via llvm-commits
• [PATCH] D156516: [lli] Fix crash on empty entry-function   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156516: [lli] Fix crash on empty entry-function   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156701: [mlir][ArmSME] Use vector.reduction add in zero test   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156517: [mlir][ArmSME] Add -canonicalize to vector to ArmSME test   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156558: [mlir][ArmSME] Remove "pure" side-effect from 'get_tile_id' op to prevent CSE   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156701: [mlir][ArmSME] Use vector.reduction add in zero test   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156802: [mlir][ArmSME] Split lowering of arith.constant from vector.transfer_write   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156802: [mlir][ArmSME] Split lowering of arith.constant from vector.transfer_write   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156802: [mlir][ArmSME] Split lowering of arith.constant from vector.transfer_write   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156976: [mlir][ArmSME] Extend vector.transfer_write lowering   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156980: [mlir][ArmSME] Extend arm_sme.zero for all types   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D157004: [mlir][ArmSME] Add vector to tile intrinsics   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D157005: [mlir][ArmSME] Add vector to tile slice op and lowerings   Cullen Rhodes via Phabricator via llvm-commits
• [llvm] 5656d79 - [llvm][tapi-diff] Transition diff-tool to be more general purpose   Cyndy Ishida via llvm-commits
• [PATCH] D153045: [llvm][tapi-diff] Transition diff-tool to be more general purpose   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156766: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156837: [AArch64][CodeGen] Avoid inverting hot branches during relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157063: [CodeGen] Make the MachineFunctionSplitter pass testable via MIR   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157063: [CodeGen] Make the MachineFunctionSplitter pass testable via MIR   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157124: [CodeGen][AArch64] Don't split jump table basic blocks   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157127: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156837: [AArch64][CodeGen] Avoid inverting hot branches during relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156767: [AArch64] [BranchRelaxation] Optimize for hot code size in AArch64 branch relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157127: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157127: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D157158: Do not merge debug locations when sinking instructions   Daniel Paoliello via Phabricator via llvm-commits
• [PATCH] D156882: [AArch64][ELF][lld] Support dynamic R_AARCH64_AUTH_* relocations   Daniil Kovalev via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Daniil Kovalev via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Daniil Kovalev via Phabricator via llvm-commits
• [PATCH] D156908: [NFC][GuardWidening] Remove dead code   Daniil Suchkov via Phabricator via llvm-commits
• [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Danila Kutenin via Phabricator via llvm-commits
• [PATCH] D156649: [AArch64] Add some basic handling for bf16 constants.   Dave Green via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Dave Green via Phabricator via llvm-commits
• [PATCH] D156649: [AArch64] Add some basic handling for bf16 constants.   Dave Green via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   Dave Green via Phabricator via llvm-commits
• [PATCH] D155484: [AArch64] Global Isel Funnel Shift Lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D152714: [AArch64][Optimization]Emit FCCMP for AND of two float compares   Dave Green via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   Dave Green via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   Dave Green via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Dave Green via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Dave Green via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   Dave Green via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Dave Green via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   Dave Green via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Dave Green via Phabricator via llvm-commits
• [PATCH] D157202: [AArch64][GISel] Fix selection of G_CONSTANT_FOLD_BARRIER   Dave Green via Phabricator via llvm-commits
• [PATCH] D156614: [AArch64][GISel] Handling for G_VECREDUCE_FMIN and G_VECREDUCE_FMAX   Dave Green via Phabricator via llvm-commits
• [PATCH] D156614: [AArch64][GISel] Handling for G_VECREDUCE_FMIN and G_VECREDUCE_FMAX   Dave Green via Phabricator via llvm-commits
• [PATCH] D134533: [BPF] Fix Segfault in BTFDebug   Dave Tucker via Phabricator via llvm-commits
• [llvm] 4e429fd - Few linter fixes   David Blaikie via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   David Blaikie via Phabricator via llvm-commits
• [PATCH] D156545: [DebugInfo][InstrRef] Don't produce over-sized DW_OP_deref_size expressions for very wide stack spills   David Blaikie via Phabricator via llvm-commits
• [PATCH] D143967: [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF   David Blaikie via Phabricator via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   David Blaikie via Phabricator via llvm-commits
• [llvm] 778fa4e - [AArch64] Add some basic handling for bf16 constants.   David Green via llvm-commits
• [llvm] f3b9b94 - [AArch64][GISel] Expand arm64-dup and arm64-rev tests for global isel. NFC   David Green via llvm-commits
• [llvm] bbe945b - [AArch64][GISel] Expand G_DUP and G_DUPLANE to v8s8 and v4s16   David Green via llvm-commits
• [llvm] 6df2c2b - [AArch64] Add a more extensive fabs test. NFC   David Green via llvm-commits
• [llvm] 0e75712 - [AArch64][GISel] Expand lowering for fminimum and fmaximum   David Green via llvm-commits
• [llvm] ffc5ed9 - [AArch64][GISel] Expand handling for G_FABS to more vector types.   David Green via llvm-commits
• [PATCH] D23727: [Profile] SelectInst instrumentation Support in IR-PGO   David Li via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   David Li via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   David Li via Phabricator via llvm-commits
• [PATCH] D155804: [LV] Cache call vectorization decisions   David Sherwood via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   David Sherwood via Phabricator via llvm-commits
• [llvm] 43ad521 - [lldb][AArch64] Add reading of TLS tpidr register from core files   David Spickett via llvm-commits
• [llvm] fbec83c - [llvm][TableGen][Jupyter] Add configurable default reset behaviour   David Spickett via llvm-commits
• [llvm] 5850124 - [LLVM][TableGen][Jupyter] Add first tutorial notebook   David Spickett via llvm-commits
• [PATCH] D149055: [llvm][TableGen][Jupyter] Add configurable default reset behaviour   David Spickett via Phabricator via llvm-commits
• [PATCH] D149055: [llvm][TableGen][Jupyter] Add configurable default reset behaviour   David Spickett via Phabricator via llvm-commits
• [PATCH] D152998: [TableGen] Support named arguments   David Spickett via Phabricator via llvm-commits
• [PATCH] D156966: [TableGen] Improve error report of unspecified arguments   David Spickett via Phabricator via llvm-commits
• [PATCH] D137085: [LLVM][TableGen][Jupyter] Add first tutorial notebook   David Spickett via Phabricator via llvm-commits
• [PATCH] D156118: [lldb][AArch64] Add reading of TLS tpidr register from core files   David Spickett via Phabricator via llvm-commits
• [PATCH] D156118: [lldb][AArch64] Add reading of TLS tpidr register from core files   David Spickett via Phabricator via llvm-commits
• [PATCH] D149055: [llvm][TableGen][Jupyter] Add configurable default reset behaviour   David Spickett via Phabricator via llvm-commits
• [PATCH] D137085: [LLVM][TableGen][Jupyter] Add first tutorial notebook   David Spickett via Phabricator via llvm-commits
• [PATCH] D137085: [LLVM][TableGen][Jupyter] Add first tutorial notebook   David Spickett via Phabricator via llvm-commits
• [PATCH] D155821: [TableGen][GlobalISel] Guarantee stable iteration order for stop-after-parse   David Spickett via Phabricator via llvm-commits
• [PATCH] D157085: [TableGen] Do not compile CombineRuleBuilder::verify in release builds   David Spickett via Phabricator via llvm-commits
• [PATCH] D142569: [OpenMP] Introduce kernel environment   Dhruva Chakrabarti via Phabricator via llvm-commits
• [PATCH] D142569: [OpenMP] Introduce kernel environment   Dhruva Chakrabarti via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D156699: [SimplifyCFG] Pre-commit test for D156612   DianQK via Phabricator via llvm-commits
• [PATCH] D156612: [SimplifyCFG] Find the smallest table considering overflow in `switchToLookupTable`   DianQK via Phabricator via llvm-commits
• [PATCH] D156789: [TailCallElim] Regenerate test checks with --function-signature (NFC)   DianQK via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   DianQK via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   DianQK via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   DianQK via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   DianQK via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   DianQK via Phabricator via llvm-commits
• [PATCH] D157177: [Coroutine][DebugInfo] Pre-commit test for a DISubprogram with declaration.   DianQK via Phabricator via llvm-commits
• [PATCH] D157184: [Coroutine][DebugInfo] Update the linkage name of the declaration of coro-split functions in the debug info.   DianQK via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   DianQK via Phabricator via llvm-commits
• [PATCH] D156413: [AMDGPU][PEI] Set up SP for chain functions   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156689: [mlir][ArmSME] Use memref indices for load and store   Diego Caballero via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Diego Caballero via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.   Dinar Temirbulatov via Phabricator via llvm-commits
• [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.   Dinar Temirbulatov via Phabricator via llvm-commits
• [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.   Dinar Temirbulatov via Phabricator via llvm-commits
• [llvm] d542a56 - [BPF] Clean up SelLowering   Eduard Zingerman via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D143967: [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D140804: [BPF] support for BPF_ST instruction in codegen   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D140804: [BPF] support for BPF_ST instruction in codegen   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D140804: [BPF] support for BPF_ST instruction in codegen   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156666: Intrinsics: Add type overload to stacksave and stackstore   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156814: [NFC] Refactor byteswapped writes   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D148043: [InferAttrs] Mark frexp and modf as memory(argmem: write)   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D157026: TEST: Remove <iomanip> from gtest   Elliot Goodrich via Phabricator via llvm-commits
• [PATCH] D157026: TEST: Remove <iomanip> from gtest   Elliot Goodrich via Phabricator via llvm-commits
• [PATCH] D157026: TEST: Remove <iomanip> from gtest   Elliot Goodrich via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Ellis Hoag via Phabricator via llvm-commits
• [llvm] 7f0d54b - [flang][openmp] Allocators construct semantic checks   Ethan Luis McDonough via llvm-commits
• [PATCH] D150428: [flang][openmp] Allocators construct semantic checks   Ethan Luis McDonough via Phabricator via llvm-commits
• [PATCH] D150428: [flang][openmp] Allocators construct semantic checks   Ethan Luis McDonough via Phabricator via llvm-commits
• [PATCH] D151204: [VPlan] Disallow sinking side-effecting first order recurrence users   Evgeniy via Phabricator via llvm-commits
• [PATCH] D155960: [NaryReassociate] Use new access type aware getGEPCost   Evgeniy via Phabricator via llvm-commits
• [PATCH] D155960: [NaryReassociate] Use new access type aware getGEPCost   Evgeniy via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Evgeny Eltsin via Phabricator via llvm-commits
• [compiler-rt] 145a929 - [scudo] Enable MemMapFuchsia   Fabio D'Urso via llvm-commits
• [compiler-rt] 30b11b0 - Revert "[scudo] Enable MemMapFuchsia"   Fabio D'Urso via llvm-commits
• [compiler-rt] 254d28f - Reland "[scudo] Enable MemMapFuchsia"   Fabio D'Urso via llvm-commits
• [compiler-rt] 558ab65 - [scudo] Select stricter atomic memory_order in MemMapFuchsia   Fabio D'Urso via llvm-commits
• [llvm] 1e06b82 - [docs] Bump minimum GCC version to 7.4   Fangrui Song via llvm-commits
• [llvm] 49d41de - MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Fangrui Song via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155993: [llvm-debuginfod] Switch to xxh3_64bits   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156772: [lld][LoongArch] Support the R_LARCH_PCREL20_S2 relocation type   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D153907: [AIX] [TOC] Add -mtocdata/-mno-tocdata options on AIX   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156796: [ADT] [NFC] Introduce isLower and isUpper helpers.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D154958: [RISCV][MC] Relax conditional branches to unresolved symbols   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D153206: [PPC32] Parse bl __tls_get_addr(x at tlsgd)@plt+32768   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156954: [lit] Improve test output from lit's internal shell   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157020: [WIP][lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157020: [WIP][lld/ELF] Don't relax R_X86_64_(REX_)GOTPCRELX when offset is too far   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option's prefixed name at compile-time   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D157027: [lld-macho][nfc]Add bounds check before attempting to dereferencing iterators.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D153206: [PPC32] Parse bl __tls_get_addr(x at tlsgd)@plt+32768   Fangrui Song via Phabricator via llvm-commits
• [llvm] 4e13042 - [LV] Add test for op truncation from 245ec675a4e41.   Florian Hahn via llvm-commits
• [llvm] 707359e - Recommit "[LV] Re-use existing broadcast value for live-ins."   Florian Hahn via llvm-commits
• [llvm] cdb7d57 - [LV] Add test for select truncation.   Florian Hahn via llvm-commits
• [llvm] d1d0e13 - [LV] Move packScalarIntoVectorValue to VPTransformState (NFC).   Florian Hahn via llvm-commits
• [llvm] 8ea274b - [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via llvm-commits
• [llvm] 89aeefc - [GVNSink] Add tests with cycles showing current mis-compiles.   Florian Hahn via llvm-commits
• [llvm] deec9e7 - [VPlan] Move VPTransformState::get() to VPlan.cpp (NFC).   Florian Hahn via llvm-commits
• [llvm] c30099e - [LV] Return null VPlanPtr instead of std::optional for tryToBuild (NFC)   Florian Hahn via llvm-commits
• [llvm] 39cf210 - [LV] Remove unnecessary std::move from tryToBuildVPlanWith.. (NFC).   Florian Hahn via llvm-commits
• [llvm] a6d6730 - [LV] Split off code to optimize initial VPlan (NFC).   Florian Hahn via llvm-commits
• [llvm] 400fde9 - [Attributor] Add lightweight version for attribute deduction only.   Florian Hahn via llvm-commits
• [llvm] 539acce - [LV] Add variant of test without dead load.   Florian Hahn via llvm-commits
• [llvm] aac8acb - [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via llvm-commits
• [PATCH] D156739: Drop some typed pointer handling   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D156416: [RemarkUtil] Refactor remarkutil tool to use a command registry.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D156840: [CaptureTracking] Add tests for allowing non-void `noalias` return funcs to be non-capturing; NFC   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154075: [LoopVectorize] Add pre-commit tests for D152366   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D151204: [VPlan] Allow sinking of instructions with no defs   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D132063: [LV] Support vectorizing 'select index of minimum element' idiom. (WIP)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157037: [VPlan] Create mask for tail-folding up-front (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157039: [VPlan] Add VPlan::hasTailFolded.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D156131: [LV] Generate predicate in a proper VPBasicBlock   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154644: [LV] Split off code to create initial VPlan (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157144: [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157037: [VPlan] Create mask for tail-folding up-front (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157037: [VPlan] Create mask for tail-folding up-front (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157194: [VPlan] Model wrap flags directly, remove *NUW opcodes (NFC)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157144: [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157223: [Transforms] Fix typo in comments   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D157034: [VPlan] Model masked assumes as replicate recipes, drop them (NFCI).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   Florian Hahn via Phabricator via llvm-commits
• [llvm] c4b21d5 - [llc] Add the command line option `-sched-model-force-enable-intervals`.   Francesco Petrogalli via llvm-commits
• [llvm] cd921e0 - [MISched] Do not erase resource booking history for subunits.   Francesco Petrogalli via llvm-commits
• [PATCH] D156540: [llc] Add the command line option `-sched-model-force-enable-intervals`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156530: [MISched] Do not erase resource booking history for subunits.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156530: [MISched] Do not erase resource booking history for subunits.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156530: [MISched] Do not erase resource booking history for subunits.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Frank (Fang) Gao via Phabricator via llvm-commits
• [llvm] dc7c018 - [X86] Promote VAES, SHA512, SM4 implied feature to AVX2   Freddy Ye via llvm-commits
• [PATCH] D156071: [HIP] Update compile options   Galina via Phabricator via llvm-commits
• [llvm] 1d9c7c4 - Increase performance of llvm-gsymutil by up to 200%.   Greg Clayton via llvm-commits
• [PATCH] D156773: Increase performance of llvm-gsymutil by up to 200%.   Greg Clayton via Phabricator via llvm-commits
• [PATCH] D156773: Increase performance of llvm-gsymutil by up to 200%.   Greg Clayton via Phabricator via llvm-commits
• [PATCH] D156834: Remove some noisy log messages from showing up in llvm-gsymutil output.   Greg Clayton via Phabricator via llvm-commits
• [PATCH] D156991: [llvm][NFC] Use CreateMemTransferInst more   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for internal variables   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Guozhi Wei via Phabricator via llvm-commits
• [llvm] 277a7e8 - build_llvm_release.bat: Update desired SWIG version for LLDB   Hans Wennborg via llvm-commits
• [llvm] beb339c - build_llvm_release.bat: Set -DCLANG_ENABLE_LIBXML2=OFF   Hans Wennborg via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for critical region lock   Hao Jin via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for internal variables   Hao Jin via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for internal variables   Hao Jin via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for internal variables   Hao Jin via Phabricator via llvm-commits
• [PATCH] D156472: [WebAssembly] Create separation between MC and CodeGen layers   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155732: [MC][COFF][AArch64] Avoid incorrect IMAGE_REL_ARM64_BRANCH26 relocations.   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D156715: [CSSPGO] Fix issues with post-link function checksum check   Hongtao Yu via Phabricator via llvm-commits
• [PATCH] D156722: [CSSPGO] Support stale profile matching for LTO   Hongtao Yu via Phabricator via llvm-commits
• [PATCH] D156715: [CSSPGO] Fix issues with post-link function checksum check   Hongtao Yu via Phabricator via llvm-commits
• [PATCH] D156656: [ValueTracking][NFC] Tests for folding icmp(constants[x])   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [ValueTracking][NFC] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [ValueTracking][InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156656: [InstCombine][NFC] Tests for folding icmp(constants[x])   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156656: [InstCombine][NFC] Tests for folding icmp(constants[x])   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156656: [InstCombine][NFC] Tests for folding icmp(constants[x])   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156656: [InstCombine][NFC] Tests for folding icmp(constants[x])   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D151567: [LLVM][Support] Report EISDIR when opening a directory on AIX   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D151567: [LLVM][Support] Report EISDIR when opening a directory on AIX   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155957: [PPC][AIX] Fix toc-data peephole bug and some related cleanup.   Hubert Tong via Phabricator via llvm-commits
• [llvm] 46b2ad0 - [CodeGen] Improve speed of ComplexDeinterleaving pass   Igor Kirillov via llvm-commits
• [PATCH] D156916: [CodeGen] Improve speed of ComplexDeinterleaving pass   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D156916: [CodeGen] Improve speed of ComplexDeinterleaving pass   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D157094: [CodeGen] Pre-commit tests showing incorrect pattern FMLA_* pseudo instructions   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D157095: [CodeGen] Fix incorrect pattern FMLA_* pseudo instructions   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D156916: [CodeGen] Improve speed of ComplexDeinterleaving pass   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D156916: [CodeGen] Improve speed of ComplexDeinterleaving pass   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D149757: Test data for symbol lookup. NFC   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D149759: [symbolizer] Support symbol lookup   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D156978: [symbolizer][NFC] Move file argument parsing into separate function   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D156978: [symbolizer][NFC] Move file argument parsing into separate function   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D156661: [SPIRV] Add support for SPV_KHR_bit_instructions   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D153099: [SPIR-V] Begin removing explicit setRegClass calls   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D154316: [SystemZ] Replace OperandMatchResultTy with ParseStatus (NFC)   Ilya Leoshkevich via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Ivan Butygin via Phabricator via llvm-commits
• [llvm] 4e814b1 - [TableGen][NFC] Refine obtaining qualified register class ids.   Ivan Kosarev via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a subtarget feature to enable true True16 codegen.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156782: [AMDGPU] Test disassembling of some basic True16 VOP2 instructions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156106: [AMDGPU] Test codegen'ing True16 additions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen][NFC] Refine obtaining qualified register class ids.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156782: [AMDGPU] Test disassembling of some basic True16 VOP2 instructions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156939: [AMDGPU][True16] Support disassembling .h registers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156939: [AMDGPU][True16] Support disassembling .h registers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen][NFC] Refine obtaining qualified register class ids.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support emitting copies between different register sizes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156985: [AMDGPU] Remove the support for non-True16 copies between different register sizes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156939: [AMDGPU][True16] Support disassembling .h registers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D157088: [AMDGPU][NFC] Refine representation of register intervals in SIInsertWaitcnts.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D157089: [AMDGPU] Fix dealing with register interval endpoints in SIInsertWaitcnts.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D157088: [AMDGPU][NFC] Refine representation of register intervals in SIInsertWaitcnts.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D157088: [AMDGPU][NFC] Refine representation of register intervals in SIInsertWaitcnts.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D157089: [AMDGPU] Fix dealing with register interval endpoints in SIInsertWaitcnts.   Ivan Kosarev via Phabricator via llvm-commits
• [llvm] 948f205 - [llvm-objdump] [NFC] Use a single vector to store all symbol mappings.   Jacek Caban via llvm-commits
• [llvm] fd5ca37 - [ADT] [NFC] Introduce isLower and isUpper helpers.   Jacek Caban via llvm-commits
• [llvm] bf8cce6 - Revert "[llvm-objdump] [NFC] Use a single vector to store all symbol mappings."   Jacek Caban via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156796: [ADT] [NFC] Introduce isLower and isUpper helpers.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156797: [llvm-readobj] [Object] [NFC] Introduce inline helpers for chpe_range_entry.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156622: [llvm-objdump] [NFC] Use a single vector to store all symbol mappings.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156796: [ADT] [NFC] Introduce isLower and isUpper helpers.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156796: [ADT] [NFC] Introduce isLower and isUpper helpers.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156797: [llvm-readobj] [Object] [NFC] Introduce inline helpers for chpe_range_entry.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156622: [llvm-objdump] [NFC] Use a single vector to store all symbol mappings.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D157141: [lld] Sort code section chunks by range types on EC targets.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D157142: [lld] Align EC code region boundaries.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D157148: [lld] Add support for EC code map.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   James Henderson via Phabricator via llvm-commits
• [PATCH] D156622: [llvm-objdump] [NFC] Use a single vector to store all symbol mappings.   James Henderson via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   James Henderson via Phabricator via llvm-commits
• [PATCH] D155993: [llvm-debuginfod] Switch to xxh3_64bits   James Henderson via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   James Henderson via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   James Henderson via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   James Henderson via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   James Henderson via Phabricator via llvm-commits
• [PATCH] D156796: [ADT] [NFC] Introduce isLower and isUpper helpers.   James Henderson via Phabricator via llvm-commits
• [PATCH] D156797: [llvm-readobj] [Object] [NFC] Introduce inline helpers for chpe_range_entry.   James Henderson via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.5   James Y Knight via Phabricator via llvm-commits
• [PATCH] D141913: WIP: Unwindabort: Add "unwindabort" syntax for the "call" instruction.   James Y Knight via Phabricator via llvm-commits
• [PATCH] D141914: WIP: Unwindabort: Add "unwindabort" syntax for the "resume" instruction.   James Y Knight via Phabricator via llvm-commits
• [PATCH] D141915: WIP: Unwindabort: Add "unwindabort" syntax for the "catchswitch" instruction.   James Y Knight via Phabricator via llvm-commits
• [PATCH] D141916: WIP: Unwindabort: add support for IR transforms and analysis.   James Y Knight via Phabricator via llvm-commits
• [PATCH] D141917: WIP: Unwindabort: Implement CodeGen for DWARF-style exception handling.   James Y Knight via Phabricator via llvm-commits
• [llvm] 673d963 - [llvm][ADT] Make `Twine` aware of `StringLiteral`   Jan Svoboda via llvm-commits
• [llvm] efcb07b - [llvm][Support] Avoid intermediate heap allocations in `StringSaver`   Jan Svoboda via llvm-commits
• [lld] 3f092f3 - [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157015: [llvm][Support] Avoid heap allocations in `StringSaver`   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157010: [llvm][ADT] Make `Twine` aware of `StringLiteral`   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157015: [llvm][Support] Avoid intermediate heap allocations in `StringSaver`   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option spelling at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option spelling at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option spelling at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option's prefixed name at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option's prefixed name at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option's prefixed name at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option's prefixed name at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157028: [llvm] Extract common `OptTable` bits into macros   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D157029: [llvm] Construct option's prefixed name at compile-time   Jan Svoboda via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Jathu Satkunarajah via Phabricator via llvm-commits
• [llvm] 0ef39e3 - [StackColoring] Fix typo in comment   Jay Foad via llvm-commits
• [llvm] eaca8c2 - [PEI][PowerPC] Switch to backwards frame index elimination   Jay Foad via llvm-commits
• [llvm] 11fbdd2 - [CodeGen] Make use of isSubRegisterEq and isSuperRegisterEq. NFC.   Jay Foad via llvm-commits
• [llvm] 8f973d5 - [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jay Foad via llvm-commits
• [llvm] c2093b8 - [AMDGPU] Add target features for GDS and GWS   Jay Foad via llvm-commits
• [llvm] 0da19a2 - [PEI][WebAssembly] Switch to backwards frame index elimination   Jay Foad via llvm-commits
• [llvm] 186b2b4 - [PEI] Switch to backwards frame index elimination by default   Jay Foad via llvm-commits
• [llvm] 25ec267 - [PEI] Remove support for register scavenging during forwards frame index elimination   Jay Foad via llvm-commits
• [llvm] 76cfdbe - [RegScavenger] Remove support for forwards register scavenging   Jay Foad via llvm-commits
• [llvm] 34ffc30 - [AMDGPU] Fix typo in comment in test   Jay Foad via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156690: [PEI][PowerPC] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156691: [PEI][WebAssembly] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU][RFC] Add a target feature for GDS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU][RFC] Add a target feature for GDS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156690: [PEI][PowerPC] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D149587: InstSimplify: Simplifications for ldexp   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU][RFC] Add a target feature for GDS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU] Add target features for GDS and GWS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156448: [TwoAddressInstruction] Tweak constraining of tied operands w/undef source   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156448: [TwoAddressInstruction] Tweak constraining of tied operands w/undef source   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU] Add target features for GDS and GWS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU] Add target features for GDS and GWS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D153257: AMDGPU: Implement llvm.set.rounding   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156226: [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D149587: InstSimplify: Simplifications for ldexp   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU] Add target features for GDS and GWS   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156448: [TwoAddressInstruction] Tweak constraining of tied operands w/undef source   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156872: [MachineVerifier] Verify LiveIntervals for PHIs   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156879: [AggressiveAntiDepBreaker] Tweak the fix for renaming a subregister of a live register   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156880: [AggressiveAntiDepBreaker] Refix renaming a subregister of a live register   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156879: [AggressiveAntiDepBreaker] Tweak the fix for renaming a subregister of a live register   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156880: [AggressiveAntiDepBreaker] Refix renaming a subregister of a live register   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156622: [llvm-objdump] [NFC] Use a single vector to store all symbol mappings.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the isNonNegative for Power2 value   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156691: [PEI][WebAssembly] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156691: [PEI][WebAssembly] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D152452: X86, PEI, WIP: Convert to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156983: [PEI] Switch to backwards frame index elimination by default   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156985: [AMDGPU] Remove the support for non-True16 copies between different register sizes.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156986: [PEI] Remove support for register scavenging during forwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156987: [RegScavenger] Remove support for forwards register scavenging   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156986: [PEI] Remove support for register scavenging during forwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156987: [RegScavenger] Remove support for forwards register scavenging   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156983: [PEI] Switch to backwards frame index elimination by default   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157030: InstCombine: Fold out scale-if-denormal pattern   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156986: [PEI] Remove support for register scavenging during forwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156987: [RegScavenger] Remove support for forwards register scavenging   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157091: AMDGPU/Uniformity/GlobalISel: G_AMDGPU atomics are always divergent   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157088: [AMDGPU][NFC] Refine representation of register intervals in SIInsertWaitcnts.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157089: [AMDGPU] Fix dealing with register interval endpoints in SIInsertWaitcnts.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157086: [LiveRange] Remove inaccurate verification of live-in PhysRegs   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157099: [AMDGPU] Add and use SIInstrFlags::GWS. NFC.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157100: [AMDGPU] Validate GDS in the assembler   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157100: [AMDGPU] Validate GDS in the assembler   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157108: APFloat: Add getExactPowerOf2   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157111: AMDGPU: Try to select fmul by power of 2 to ldexp   Jay Foad via Phabricator via llvm-commits
• [PATCH] D157089: [AMDGPU] Fix dealing with register interval endpoints in SIInsertWaitcnts.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Jeff Niu via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Jeff Niu via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   Jeff Niu via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   Jeff Niu via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Jeff Niu via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Jeff Niu via Phabricator via llvm-commits
• [PATCH] D157133: [AMDGPU] Extend CalculateByteProvider to capture vectors and signed   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D155995: [AMDGPU] WIP: Allow matching into v_dot4   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D155995: [AMDGPU] WIP: Allow matching into v_dot4   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D157133: [AMDGPU] Extend CalculateByteProvider to capture vectors and signed   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D157133: [AMDGPU] Extend CalculateByteProvider to capture vectors and signed   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D157133: [AMDGPU] Extend CalculateByteProvider to capture vectors and signed   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D155668: [RISCV] Upgrade Zvfh version to 1.0 and move out of experimental state.   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156504: [sanitizer_common] Remove hacks for __builtin_return_address abuse on SPARC   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D153848: [RISCV] Apply promotion for f16 vector ops when only have zvfhmin.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D153848: [RISCV] Apply promotion for f16 vector ops when only have zvfhmin.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D153848: [RISCV] Apply promotion for f16 vector ops when only have zvfhmin.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D121187: [DAGCombiner][VP] Add DAGCombine for VP_MUL.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D157077: [RISCV] Teach VSETVLIInserter to not demand tail policy when there is no tail element   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D156018: [BOLT] Impl createRelocation for AArch64   Jiapeng Zhou via Phabricator via llvm-commits
• [PATCH] D156018: [BOLT] Impl createRelocation for AArch64   Jiapeng Zhou via Phabricator via llvm-commits
• [PATCH] D157217: [BOLT] Split createRelocation in X86 and share the second part   Jiapeng Zhou via Phabricator via llvm-commits
• [PATCH] D156018: [BOLT] Implement createRelocation for AArch64   Jiapeng Zhou via Phabricator via llvm-commits
• [llvm] d6a48a3 - [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via llvm-commits
• [llvm] 40cc106 - [RISCV] Scalarize binop followed by extractelement to custom lowered instruction   Jim Lin via llvm-commits
• [llvm] a2938ba - [RISCV] Add tests that m extension enabled in extractelt-int-rv64.ll. NFC.   Jim Lin via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156685: [RISCV] Match ext_vl + ext_vl + srem + trunc_vl to vrem.vv   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to W instruction on RV64   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to custom lowered instruction   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156692: [RISCV] Scalarize binop followed by extractelement to custom lowered instruction   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Refine getMaxPushPopReg like getLibCallID. NFC.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D157002: [AArch64] Add an option to do machine cse at all time regardless of profitable checking   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support emitting copies between different register sizes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156782: [AMDGPU] Test disassembling of some basic True16 VOP2 instructions.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156985: [AMDGPU] Remove the support for non-True16 copies between different register sizes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156939: [AMDGPU][True16] Support disassembling .h registers.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D157103: AMDGPU: Fix counting source modifiers as literal constants   Joe Nash via Phabricator via llvm-commits
• [PATCH] D157103: AMDGPU: Fix counting source modifiers as literal constants   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156954: [lit] Improve test output from lit's internal shell   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D156954: [lit] Improve test output from lit's internal shell   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D156954: [lit] Improve test output from lit's internal shell   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Joel E. Denny via Phabricator via llvm-commits
• [llvm] 6fa8244 - [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via llvm-commits
• [llvm] fa367d1 - [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Johannes Doerfert via llvm-commits
• [llvm] 578ab33 - [Attributor][NFCI] Use a uniform necessary query to avoid a unique one   Johannes Doerfert via llvm-commits
• [llvm] 4fd9874 - [Attributor][NFCI] Exit reachability queries early if the target is not live   Johannes Doerfert via llvm-commits
• [llvm] 2a20c64 - [Attributor][NFCI] Use DominatorTree to short circuit reachability queries   Johannes Doerfert via llvm-commits
• [llvm] 78daab0 - [Attributor][NFCI] Compute ReachabilityQueryInfo hash once and on demand   Johannes Doerfert via llvm-commits
• [llvm] d70ab63 - [Attributor][NFCI] Filter uninteresting accesses early   Johannes Doerfert via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156739: Drop some typed pointer handling   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D157147: [IR] Mark `llvm.trap` as `nosync, nofree, nocallback`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D157147: [IR] Mark `llvm.trap` as `nosync, nofree, nocallback`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Johannes de Fine Licht via Phabricator via llvm-commits
• [PATCH] D156875: [ARM] Improve generation of thumb stack accesses   John Brawn via Phabricator via llvm-commits
• [PATCH] D155773: [llvm][MemoryBuiltins] Add alloca support to getInitialValueOfAllocation   John McIver via Phabricator via llvm-commits
• [llvm] 3feb63e - [TLI][AArch64] Add SLEEF mappings to scalable vector functions for fmod and fmodf   Jolanta Jensen via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156920: [TLI][AArch64] Add SLEEF mappings to scalable vector functions for fmod and fmodf   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156920: [TLI][AArch64] Add SLEEF mappings to scalable vector functions for fmod and fmodf   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [llvm] ed83797 - [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via llvm-commits
• [PATCH] D156710: [TargetParser] Generate RISCVTargetParserDef only if RISCV is enabled.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156735: Do not let Value::stripPointerCasts() look through returned arg functions.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156735: Do not let Value::stripPointerCasts() look through returned arg functions.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156735: Do not let Value::stripPointerCasts() look through returned arg functions.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle trunc(sext x) in artifact combiner   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156991: [llvm][NFC] Use CreateMemTransferInst more   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle sequences of trunc(sext/zext/anyext...) in artifact combiner   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156758: [dwp][libtool-darwin][sancov] Enable llvm-driver   Jonas Devlieghere via Phabricator via llvm-commits
• [PATCH] D156758: [dwp][libtool-darwin][sancov] Enable llvm-driver   Jonas Devlieghere via Phabricator via llvm-commits
• [PATCH] D153268: [DWARFLinkerParallel] Add limited functionality to DWARFLinkerParallel.   Jonas Devlieghere via Phabricator via llvm-commits
• [PATCH] D156781: Use the canonical path for the include header search.   Jonas via Phabricator via llvm-commits
• [PATCH] D156781: Use the canonical path for the include header search.   Jonas via Phabricator via llvm-commits
• [PATCH] D156781: Use the canonical path for the include header search.   Jonas via Phabricator via llvm-commits
• [PATCH] D156781: Use the canonical path for the include header search.   Jonas via Phabricator via llvm-commits
• [llvm] f5b5a30 - Revert "[CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it"   Jordan Rupprecht via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Jordan Rupprecht via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Jordan Rupprecht via Phabricator via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Joseph Faulls via Phabricator via llvm-commits
• [PATCH] D156955: [OpenMP] Fix the linkage for kernel environment global variable   Joseph Huber via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Joseph Huber via Phabricator via llvm-commits
• [PATCH] D156814: [NFC] Refactor byteswapped writes   Joshua Batista via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Joshua Cranmer via Phabricator via llvm-commits
• [PATCH] D157108: APFloat: Add getExactLog2   Joshua Cranmer via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156680: AMDGPU: Don't store current instruction in AMDGPULibCalls member   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156678: AMDGPU: Refactor libcall simplify to help with future refined fast math flag usage   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156671: [AMDGPU][SIInsertWaitcnts] Initialize the WaitcntBrackets for non-kernel functions   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156679: [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D156707: AMDGPU: Handle multiple uses when matching sincos   Juan Manuel Martinez Caamaño via Phabricator via llvm-commits
• [PATCH] D155028: [ConstantHoisting] add XFAIL test case   Juergen Ributzka via Phabricator via llvm-commits
• [llvm] 934b490 - [RISCV] Expand load extension / truncate store for bf16   Jun Sha via llvm-commits
• [PATCH] D156646: [RISCV] Expand load extension / truncate store for bf16   Jun Sha via Phabricator via llvm-commits
• [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156943: [RISCV] Implement straight-forward bf16<->int conversion cases   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156943: [RISCV] Implement straight-forward bf16<->int conversion cases   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156990: [LegalizeTypes][RISCV] Support libcalls for fpto{s,u}i of bfloat by extending to f32 first   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156990: [LegalizeTypes][RISCV] Support libcalls for fpto{s,u}i of bfloat by extending to f32 first   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156265: RegisterCoalescer: Remove dubious dropping of implicit virtual register defs   Justin Bogner via Phabricator via llvm-commits
• [PATCH] D156814: [NFC] Refactor byteswapped writes   Justin Bogner via Phabricator via llvm-commits
• [PATCH] D157149: [Option] Add "Visibility" field and clone the OptTable APIs to use it   Justin Bogner via Phabricator via llvm-commits
• [PATCH] D157151: [Driver] Refactor to use llvm Option's new Visibility flags   Justin Bogner via Phabricator via llvm-commits
• [PATCH] D157196: [SelectionDAG] Add Opc_CheckPatternPredicate2 to support targets with more than 256 predicates.   Justin Bogner via Phabricator via llvm-commits
• [PATCH] D156967: [SelectionDAG] Encode CheckPatternPredicate num in VBR format to expand the range it can represents   Justin Bogner via Phabricator via llvm-commits
• [llvm] ca6d86f - [JITLink][PowerPC] Support R_PPC64_PCREL34   Kai Luo via llvm-commits
• [llvm] 5cb2a78 - [Orc][PowerPC] Enable ELFNixPlatform support for ppc64le   Kai Luo via llvm-commits
• [compiler-rt] 9c38a17 - [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via llvm-commits
• [compiler-rt] f9546d8 - [Orc][rtlib] Build orc runtime support for ppc64 only under Linux   Kai Luo via llvm-commits
• [llvm] 68c98f3 - [JITLink][PowerPC] Add run lines for powerpc64. NFC.   Kai Luo via llvm-commits
• [llvm] be7a546 - [JITLink][ELF] Fix reading target architecture when the ELF object is big-endian   Kai Luo via llvm-commits
• [llvm] 0c1f318 - [JITLink][PowerPC] Rename test files by removing 'le' suffix. NFC.   Kai Luo via llvm-commits
• [PATCH] D156399: [Orc][PowerPC] Enable ELFNixPlatform support for ppc64le   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156399: [Orc][PowerPC] Enable ELFNixPlatform support for ppc64le   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155771: [JITLink][PowerPC] Support R_PPC64_PCREL34   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156399: [Orc][PowerPC] Enable ELFNixPlatform support for ppc64le   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156292: [PowerPC] Support initial-exec TLS relocation on AIX   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156982: [JITLink][ELF] Create big-endian ELF object   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156982: [JITLink][ELF] Fix reading target architecture when the ELF object is big-endian   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   KaiYi via Phabricator via llvm-commits
• [llvm] f60616c - [Transforms] Remove unused forward declaration ModulePass   Kazu Hirata via llvm-commits
• [llvm] 821687a - [Transforms] Remove unused forward declaration LoopInfo   Kazu Hirata via llvm-commits
• [llvm] 2647439 - [Transforms] Remove unused forward declaration PostDominatorTree   Kazu Hirata via llvm-commits
• [llvm] feafc2d - [Transforms] Remove unused forward declaration AAResults   Kazu Hirata via llvm-commits
• [llvm] b53f6ef - [CodeGen] Remove unused forward declaration MachineRegisterInfo   Kazu Hirata via llvm-commits
• [llvm] e1a9da3 - [IR] Remove CreateExtractInteger   Kazu Hirata via llvm-commits
• [PATCH] D157073: [LegacyPM] Remove LowerGuardIntrinsicLegacyPass   Kazu Hirata via Phabricator via llvm-commits
• [PATCH] D154223: [llvm-cov] Allow multiple remaps in --path-equivalence   Keith Smiley via Phabricator via llvm-commits
• [llvm] 1e7c79d - [FPEnv][InstCombine] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] d9b1036 - [FPEnv][InstSimplify] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] b711d11 - Revert "[FPEnv][InstSimplify] Correct strictfp tests."   Kevin P. Neal via llvm-commits
• [llvm] b58b7f7 - [FPEnv][LibCallsShrinkWrap] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] eb2558c - Recommit [FPEnv][InstSimplify] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Kevin P. Neal via Phabricator via llvm-commits
• [PATCH] D149895: [SystemZ][z/OS] Remove ENDRecord class from GOFF.h   Kevin P. Neal via Phabricator via llvm-commits
• [PATCH] D150613: [SystemZ][z/OS] Implement yaml2obj for GOFF Object File Format   Kevin P. Neal via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Khem Raj via Phabricator via llvm-commits
• [PATCH] D150428: [flang][openmp] Allocators construct semantic checks   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when csr instructions aren't present   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156974: [RISCV] Fix the predicate code of uimm6   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D157250: [RISCV] Enable alias analysis by default   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D157230: [SPARC][IAS] Add SETX pseudoinstruction   Koakuma via Phabricator via llvm-commits
• [PATCH] D157231: [SPARC][IAS] Add definitions for v9 State Registers   Koakuma via Phabricator via llvm-commits
• [PATCH] D157232: [SPARC][IAS] Add v9 encoding of %fq   Koakuma via Phabricator via llvm-commits
• [PATCH] D157233: [SPARC][IAS] Add complete set of v9 ASI load, store & swap forms   Koakuma via Phabricator via llvm-commits
• [PATCH] D157234: [SPARC][IAS] Add support for the full set of CAS instructions   Koakuma via Phabricator via llvm-commits
• [PATCH] D157235: [SPARC][IAS] Add named ASI tag constants for memory instructions   Koakuma via Phabricator via llvm-commits
• [PATCH] D157236: [SPARC][IAS] Add more instruction aliases   Koakuma via Phabricator via llvm-commits
• [PATCH] D144936: [SPARC][IAS] Add support for v9 DONE, RETRY, SAVED, & RESTORED   Koakuma via Phabricator via llvm-commits
• [PATCH] D154321: [Sparc] Replace OperandMatchResultTy with ParseStatus (NFC)   Koakuma via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Kohei Asano via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Kohei Asano via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Kohei Asano via Phabricator via llvm-commits
• [PATCH] D156131: [LV] Generate predicate in a proper VPBasicBlock   Kolya Panchenko via Phabricator via llvm-commits
• [PATCH] D156131: [LV] Generate predicate in a proper VPBasicBlock   Kolya Panchenko via Phabricator via llvm-commits
• [PATCH] D156873: [Workflow] Run the repository sync script from GH.   Konrad Wilhelm Kleine via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155915: [NFC][DAGCombiner] Tests for future commit.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155915: [NFC][DAGCombiner] Tests for future commit.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156994: [NewGVN] Only perform symbolic evaluation on instructions (NFC)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Kristof Beyls via Phabricator via llvm-commits
• [PATCH] D156716: [AArch64][PAC] Check authenticated LR value during tail call   Kristof Beyls via Phabricator via llvm-commits
• [PATCH] D155960: [NaryReassociate] Use new access type aware getGEPCost   Krzysztof Drewniak via Phabricator via llvm-commits
• [llvm] 7846d98 - [gn build] Port 4d42e8b5d1fa   LLVM GN Syncbot via llvm-commits
• [llvm] 8ccdb8e - [gn build] Port 6553608acac4   LLVM GN Syncbot via llvm-commits
• [llvm] 8d359b2 - [gn build] Port 93a3706711fd   LLVM GN Syncbot via llvm-commits
• [llvm] 1416614 - [gn build] Port 466bd9981150   LLVM GN Syncbot via llvm-commits
• [llvm] 6506b82 - [gn build] Port 8670b53e11bb   LLVM GN Syncbot via llvm-commits
• [llvm] 8066d61 - [gn build] Port 24f320e48c83   LLVM GN Syncbot via llvm-commits
• [llvm] 56a31b8 - [gn build] Port bd7a4d7b2736   LLVM GN Syncbot via llvm-commits
• [llvm] eb97562 - [gn build] Port 5c98617ccc4b   LLVM GN Syncbot via llvm-commits
• [llvm] e0b3f45 - [ORC] Automatically suspend and resume lookups that depend on in-use generators.   Lang Hames via llvm-commits
• [llvm] dce1793 - [JITLink][aarch32] Change writeRegister's return type to void.   Lang Hames via llvm-commits
• [PATCH] D156399: [Orc][PowerPC] Enable ELFNixPlatform support for ppc64le   Lang Hames via Phabricator via llvm-commits
• [PATCH] D155771: [JITLink][PowerPC] Support R_PPC64_PCREL34   Lang Hames via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Lang Hames via Phabricator via llvm-commits
• [PATCH] D156982: [JITLink][ELF] Fix reading target architecture when the ELF object is big-endian   Lang Hames via Phabricator via llvm-commits
• [PATCH] D155557: [JITLink] Add public APIs for getting stub creation functions.   Lang Hames via Phabricator via llvm-commits
• [PATCH] D140806: Change getProcessTriple to return different archs in universal binary   Lang Hames via Phabricator via llvm-commits
• [PATCH] D132988: Changes to use a string pool for symbols   Lang Hames via Phabricator via llvm-commits
• [PATCH] D153907: [AIX] [TOC] Add -mtocdata/-mno-tocdata options on AIX   Lei Huang via Phabricator via llvm-commits
• [PATCH] D156715: [CSSPGO] Fix issues with post-link function checksum check   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156722: [CSSPGO] Support stale profile matching for LTO   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156725: [CSSPGO] Improve computing profile staleness metrics in post-link time   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156715: [CSSPGO] Fix issues with post-link function checksum check   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156715: [CSSPGO] Fix issues with post-link function checksum check   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156722: [CSSPGO] Support stale profile matching for LTO   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156722: [CSSPGO] Support stale profile matching for LTO   Lei Wang via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   Lei Wang via Phabricator via llvm-commits
• [PATCH] D156715: [CSSPGO] Fix issues with post-link function checksum check   Lei Wang via Phabricator via llvm-commits
• [compiler-rt] fe19578 - [hwasan] Enable leak detection in hwasan for Fuchsia by default   Leonard Chan via llvm-commits
• [PATCH] D157127: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Leonard Chan via Phabricator via llvm-commits
• [PATCH] D157127: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Leonard Chan via Phabricator via llvm-commits
• [PATCH] D157161: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Leonard Chan via Phabricator via llvm-commits
• [PATCH] D157127: [CodeGen][AArch64] Don't split functions with a red zone on AArch64   Leonard Chan via Phabricator via llvm-commits
• [PATCH] D155049: [ScalarEvolution] Infer loop max trip count from memory accesses   Liren.Peng via Phabricator via llvm-commits
• [PATCH] D155049: [ScalarEvolution] Infer loop max trip count from memory accesses   Liren.Peng via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156772: [lld][LoongArch] Support the R_LARCH_PCREL20_S2 relocation type   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156772: [lld][LoongArch] Support the R_LARCH_PCREL20_S2 relocation type   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155829: [LoongArch] Add LSX intrinsic support   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155830: [LoongArch] Add LASX intrinsic support   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156772: [lld][LoongArch] Support the R_LARCH_PCREL20_S2 relocation type   Lu Weining via Phabricator via llvm-commits
• [llvm] 0834355 - [RISCV] Add VP patterns for vwsll.[vv,vx,vi]   Luke Lau via llvm-commits
• [PATCH] D153278: [RISCV] Add test for un-maskable pseudo without policy operand   Luke Lau via Phabricator via llvm-commits
• [PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op   Luke Lau via Phabricator via llvm-commits
• [PATCH] D153011: [RISCV] Add TU variants to VPseudoBinaryM. NFC   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156915: [RISCV] Add VP patterns for vwsll.[vv,vx,vi]   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156915: [RISCV] Add VP patterns for vwsll.[vv,vx,vi]   Luke Lau via Phabricator via llvm-commits
• [PATCH] D155960: [NaryReassociate] Use new access type aware getGEPCost   Luke Lau via Phabricator via llvm-commits
• [PATCH] D157077: [RISCV] Teach VSETVLIInserter to not demand tail policy when there is no tail element   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156610: [WIP][LSR] Transform div instruction to add in loop   LuoYuanke via Phabricator via llvm-commits
• [PATCH] D156610: [WIP][LSR] Transform div instruction to add in loop   LuoYuanke via Phabricator via llvm-commits
• [llvm] 96cae81 - [ScalarEvolution][NFC] Typo fix   Maksim Kita via llvm-commits
• [llvm] 2c4e1df - [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition tests   Maksim Kita via llvm-commits
• [llvm] 991855e - [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Maksim Kita via llvm-commits
• [PATCH] D156619: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156621: [ScalarEvolution][NFC] Typo fix   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156619: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine][NFC] Fix typo   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine][NFC] Fix typo   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156910: [clang] Add pragma force_vectorize   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156910: [clang] Add pragma force_vectorize   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine][NFC] Fix typo   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D154749: [BOLT][NFC] Simplify DataAggregator/YAMLProfileReader   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156742: [BOLT][DWARF] Fix handling inlined subroutine with no output pc.   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156957: [BOLT][DWARF] Delete DW_AT_low_pc when converting to ranges.   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156958: [BOLT][DWARF] Fix handling CU with DW_AT_ranges   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D150874: [JITLink][NFC] Store external symbols in a StringMap   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D157206: [BOLT] Fix typo in comment   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156994: [NewGVN] Only perform symbolic evaluation on instructions (NFC)   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156994: [NewGVN] Only perform symbolic evaluation on instructions (NFC)   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156994: [NewGVN] Only perform symbolic evaluation on instructions (NFC)   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Markus Böck via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Markus Böck via Phabricator via llvm-commits
• [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the isNonNegative for Power2 value   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D157241: [llvm-rc] Resolve the executable path if not present in Argv[0]   Martin Storsjö via Phabricator via llvm-commits
• [llvm] d388222 - InstCombine: Drop some typed pointer bitcast handling   Matt Arsenault via llvm-commits
• [llvm] 360a5d5 - AMDGPU: Remove some typed pointer handling   Matt Arsenault via llvm-commits
• [llvm] acc163d - Inliner: Regenerate test   Matt Arsenault via llvm-commits
• [llvm] 51ec5a2 - AMDGPU: Use available subtarget member   Matt Arsenault via llvm-commits
• [llvm] 055a7f2 - AMDGPU: Adjust outdated comment   Matt Arsenault via llvm-commits
• [llvm] d74c89f - InstCombine: Drop some typed pointer bitcasts   Matt Arsenault via llvm-commits
• [llvm] ab6cd2d - AMDGPU: Simplify early exit handling for libcall simplify   Matt Arsenault via llvm-commits
• [llvm] d6f9428 - GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Matt Arsenault via llvm-commits
• [llvm] fbeda97 - InstCombine: Drop some typed pointer cast handling   Matt Arsenault via llvm-commits
• [llvm] 2dc1a27 - AMDGPU: Some AMDGPULibCalls cleanups   Matt Arsenault via llvm-commits
• [llvm] 8a677a7 - AMDGPU: Partially respect nobuiltin in libcall simplifier   Matt Arsenault via llvm-commits
• [llvm] 94d5545 - AMDGPU: Don't parse name of sin/cos twice in libcall simplify   Matt Arsenault via llvm-commits
• [llvm] 8f38138 - AMDGPU: Refactor libcall simplify to help with future refined fast math flag usage   Matt Arsenault via llvm-commits
• [llvm] c2c22c6 - AMDGPU: Don't store current instruction in AMDGPULibCalls member   Matt Arsenault via llvm-commits
• [llvm] f63cdfc - AMDGPU: Move check of compatible libcall   Matt Arsenault via llvm-commits
• [llvm] f9b2cbf - InstCombine: Drop some typed pointer handling   Matt Arsenault via llvm-commits
• [llvm] 0aa439d - AMDGPU/GlobalISel: Use SGPR results for G_AMDGPU_WAVE_ADDRESS   Matt Arsenault via llvm-commits
• [llvm] 02a0b11 - AMDGPU: Remove weird usage of implicit operand on COPY   Matt Arsenault via llvm-commits
• [llvm] 161c0d5 - RegisterCoalescer: Remove dubious dropping of implicit virtual register defs   Matt Arsenault via llvm-commits
• [llvm] db4d6ef - AMDGPU: Directly emit fabs intrinsic instead of new libcall   Matt Arsenault via llvm-commits
• [llvm] 5b5bd81 - AMDGPU: Move placement of RemoveIncompatibleFunctions   Matt Arsenault via llvm-commits
• [llvm] 4d42e8b - Reapply "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"   Matt Arsenault via llvm-commits
• [llvm] 3b2f323 - AMDGPU: Don't try memory optimizations in libcall optimizer   Matt Arsenault via llvm-commits
• [llvm] eb00555 - AMDGPU: Add more tests for sincos recognition   Matt Arsenault via llvm-commits
• [llvm] 5dfdd34 - AMDGPU: Don't try to fold wavefrontsize intrinsic in libcall simplify   Matt Arsenault via llvm-commits
• [llvm] 9a80655 - AMDGPU: Delete old PM support for libcall passes   Matt Arsenault via llvm-commits
• [llvm] 1f0d24c - update_llc_test_checks: Fix broken amdgpu test   Matt Arsenault via llvm-commits
• [llvm] b953155 - AMDGPU: Fix counting debug instructions in execz skip threshold   Matt Arsenault via llvm-commits
• [llvm] ed0dbfe - InstCombine: Remove dead fsub-as-fneg handling   Matt Arsenault via llvm-commits
• [llvm] 020d2fb - InstCombine: Avoid repeated m_OneUse checks   Matt Arsenault via llvm-commits
• [llvm] 30fff94 - InstCombine: Don't bother skipping over pointer bitcasts   Matt Arsenault via llvm-commits
• [llvm] 54bda79 - AMDGPU: Simplify and improve sincos matching   Matt Arsenault via llvm-commits
• [llvm] 4f85136 - AMDGPU: Remove extra parentheses   Matt Arsenault via llvm-commits
• [llvm] b0f4b65 - AMDGPU: Delete probably wrong constant folding of expm1   Matt Arsenault via llvm-commits
• [llvm] 0efdf3b - DAG: Remove getTargetIndex as it's unused   Matt Arsenault via llvm-commits
• [PATCH] D156666: Intrinsics: Add type overload to stacksave and stackstore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156667: GlobalISel: Don't expand stacksave/stackrestore in IRTranslator   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156668: AMDGPU/GlobalISel: Use SGPR results for G_AMDGPU_WAVE_ADDRESS   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156669: AMDGPU: Handle llvm.stacksave and llvm.stackrestore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156670: AMDGPU/GlobalISel: Handle stacksave/stackrestore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156669: AMDGPU: Handle llvm.stacksave and llvm.stackrestore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156666: Intrinsics: Add type overload to stacksave and stackstore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156676: AMDGPU: Remove pointless libcall recognition of native_{divide|recip}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156677: AMDGPU: Remove pointless libcall optimization of fma/mad   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156678: AMDGPU: Refactor libcall simplify to help with future refined fast math flag usage   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156680: AMDGPU: Don't store current instruction in AMDGPULibCalls member   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156681: AMDGPU: Move check of compatible libcall   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156680: AMDGPU: Don't store current instruction in AMDGPULibCalls member   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156680: AMDGPU: Don't store current instruction in AMDGPULibCalls member   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156682: AMDGPU: Partially respect nobuiltin in libcall simplifier   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156479: GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156678: AMDGPU: Refactor libcall simplify to help with future refined fast math flag usage   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156696: AMDGPU: Add more tests for sincos recognition   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156696: AMDGPU: Add more tests for sincos recognition   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156682: AMDGPU: Partially respect nobuiltin in libcall simplifier   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156676: AMDGPU: Remove pointless libcall recognition of native_{divide|recip}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156677: AMDGPU: Remove pointless libcall optimization of fma/mad   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156678: AMDGPU: Refactor libcall simplify to help with future refined fast math flag usage   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156680: AMDGPU: Don't store current instruction in AMDGPULibCalls member   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156707: AMDGPU: Handle multiple uses when matching sincos   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156708: AMDGPU: Consider nobuiltin when querying defined libfuncs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU][RFC] Add a target feature for GDS   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156696: AMDGPU: Add more tests for sincos recognition   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156720: AMDGPU: Try to use private version of sincos if available   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156696: AMDGPU: Add more tests for sincos recognition   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156647: [AMDGPU] Extend f32 support for llvm.amdgcn.update.dpp intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156647: [AMDGPU] Extend f32 support for llvm.amdgcn.update.dpp intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156681: AMDGPU: Move check of compatible libcall   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156744: AMDGPU: Don't try to fold wavefrontsize intrinsic in libcall simplify   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155375: [wip/help] Access TargetMachine without crashing   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156746: AMDGPU: Don't try memory optimzations in libcall optimizer   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156747: AMDGPU: Delete old PM support for libcall passes   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156666: Intrinsics: Add type overload to stacksave and stackstore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156666: Intrinsics: Add type overload to stacksave and stackstore   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156668: AMDGPU/GlobalISel: Use SGPR results for G_AMDGPU_WAVE_ADDRESS   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156265: RegisterCoalescer: Remove dubious dropping of implicit virtual register defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155987: AMDGPU: Move placement of RemoveIncompatibleFunctions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155484: [AArch64] Global Isel Funnel Shift Lowering   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156713: [AMDGPU] Add target features for GDS and GWS   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156708: AMDGPU: Consider nobuiltin when querying defined libfuncs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D149587: InstSimplify: Simplifications for ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155790: PreISelIntrinsicLowering: don't expand memcpys in minsize functions, even with no-builtins.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156746: AMDGPU: Don't try memory optimzations in libcall optimizer   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156696: AMDGPU: Add more tests for sincos recognition   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156744: AMDGPU: Don't try to fold wavefrontsize intrinsic in libcall simplify   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156831: [AArch64][GlobalISel] Legalize integer across-lane intrinsics with actual type   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156747: AMDGPU: Delete old PM support for libcall passes   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle trunc(sext x) in artifact combiner   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155865: [AMDGPU][GlobalISel] Update legalizer for G_ABS, G_SMIN, G_SMAX, G_UMIN, G_UMAX   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153158: AMDGPU: Implement llvm.get.rounding   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153158: AMDGPU: Implement llvm.get.rounding   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153257: AMDGPU: Implement llvm.set.rounding   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D145660: [Xtensa] Codegen support for memory operations   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155296: [InstCombine] Precommit tests for D155295   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155417: [DominanceFrontier] fix addToFrontier to use insert   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D147363: [AMDGPU] Add target hook to isGlobalMemoryObject   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D145658: [Xtensa] Initial support of the ALU operations.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D145661: [Xtensa] Add Constant Pool   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D145662: [Xtensa] Implement asm representation of the Constant Pool.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D145663: [Xtensa] Implement lowering constants.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156845: [ConstantRange] Calculate precise range for shl by -1   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D149587: InstSimplify: Simplifications for ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156139: AMDGPU: Fix counting debug instructions in execz skip threshold   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156880: [AggressiveAntiDepBreaker] Refix renaming a subregister of a live register   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156880: [AggressiveAntiDepBreaker] Refix renaming a subregister of a live register   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156707: AMDGPU: Handle multiple uses when matching sincos   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156892: AMDGPU: Delete probably wrong constant folding of expm1   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155417: [DominanceFrontier] fix addToFrontier to use insert   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156706: AMDGPU: Simplify and improve sincos matching   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156691: [PEI][WebAssembly] Switch to backwards frame index elimination   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D151887: InstSimplify: Start cleaning up simplifyFCmpInst   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156987: [RegScavenger] Remove support for forwards register scavenging   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157012: AMDGPU/GlobalISel: insert readfirstlane on SGPR inlineasm copy   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156973: [AMDGPU] Add extended-image-insts to RemoveIncompatibleFunctions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157030: InstCombine: Fold out scale-if-denormal pattern   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156972: [DAG] Fix crash in replaceStoreOfInsertLoad   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157091: AMDGPU/Uniformity/GlobalISel: G_AMDGPU atomics are always divergent   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157091: AMDGPU/Uniformity/GlobalISel: G_AMDGPU atomics are always divergent   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D113318: [AMDGPU] Make getInstSizeInBytes more generic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157103: AMDGPU: Fix counting source modifiers as literal constants   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157108: APFloat: Add getExactPowerOf2   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157111: AMDGPU: Try to select fmul by power of 2 to ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157108: APFloat: Add getExactLog2   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157111: AMDGPU: Try to select fmul by power of 2 to ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157030: InstCombine: Fold out scale-if-denormal pattern   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157111: AMDGPU: Try to select fmul by power of 2 to ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157100: [AMDGPU] Validate GDS in the assembler   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157103: AMDGPU: Fix counting source modifiers as literal constants   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157103: AMDGPU: Fix counting source modifiers as literal constants   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157133: [AMDGPU] Extend CalculateByteProvider to capture vectors and signed   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157111: AMDGPU: Try to select fmul by power of 2 to ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157108: APFloat: Add getExactLog2   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D157030: InstCombine: Fold out scale-if-denormal pattern   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156707: AMDGPU: Handle multiple uses when matching sincos   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156892: AMDGPU: Delete probably wrong constant folding of expm1   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D139074: Vectorization Of Conditional Statements Using BOSCC   Matt D. via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Matt Devereau via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Matt Devereau via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Matt Devereau via Phabricator via llvm-commits
• [PATCH] D156109: [AArch64][SME] Create new interface for isFullSVEAvailable.   Matt Devereau via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D157206: [BOLT] Fix typo in comment   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157216: [polly] Fix typo in comment   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157218: [MCA] Fix typo in comments   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157219: [CodeGen] Fix typo in comments   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157220: [Analysis] Fix typo in comments   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157221: [PassManager] Fix typo in comment   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157222: [llvm-c] Fix typo in comments   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157223: [Transforms] Fix typo in comments   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157224: [Target] Fix typo in comments   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157225: [ObjectYAML] Fix typo in comment title   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [PATCH] D157226: Fix typos in comments of ExecutionEngine/   Mehmet Eymen Ünay via Phabricator via llvm-commits
• [llvm] 5962942 - [LV][NFC] Refine comments related to reduction idioms.   Mel Chen via llvm-commits
• [llvm] 97cccdd - [LV][NFC] Remove the redundant braces.   Mel Chen via llvm-commits
• [llvm] 425e9e8 - [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Mel Chen via Phabricator via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D157112: [libc] Define long long limits if not defined   Michael Jones via Phabricator via llvm-commits
• [PATCH] D157112: [libc] Define long long limits if not defined   Michael Jones via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156165: [LAA] MaxSafeVectorWidthBits depends on changes to MinDepDist   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156158: [LAA] Rename and fix semantics of MaxSafeDepDistBytes to MinDepDistBytes   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D150706: [LAA] Update MaxSafeDepDistBytes when non-unit stride   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D57896: Variable names rule   Michael Platings via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Mike Hommey via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Mike Hommey via Phabricator via llvm-commits
• [llvm] 0fb3ebb - [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Mikhail Gudim via llvm-commits
• [PATCH] D155344: [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Mikhail Gudim via Phabricator via llvm-commits
• [PATCH] D155344: [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Mikhail Gudim via Phabricator via llvm-commits
• [PATCH] D155344: [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Mikhail Gudim via Phabricator via llvm-commits
• [PATCH] D155617: [WIP] GSoC 2023: Pass to annotate functions with appropriate optimization level.   Mircea Trofin via Phabricator via llvm-commits
• [PATCH] D157101: [benchmark] Refresh `benchmark` from upstream   Mircea Trofin via Phabricator via llvm-commits
• [PATCH] D157101: [benchmark] Refresh `benchmark` from upstream   Mircea Trofin via Phabricator via llvm-commits
• [llvm] fadf3e7 - [AMDGPU][GlobalISel] Update legalizer for G_ABS, G_SMIN, G_SMAX, G_UMIN, G_UMAX   Mirko Brkusanin via llvm-commits
• [llvm] acdc503 - [AMDGPU][GlobalISel] Update applyMappingImpl for G_ABS and type v2s16   Mirko Brkusanin via llvm-commits
• [PATCH] D156668: AMDGPU/GlobalISel: Use SGPR results for G_AMDGPU_WAVE_ADDRESS   Mirko Brkusanin via Phabricator via llvm-commits
• [PATCH] D155865: [AMDGPU][GlobalISel] Update legalizer for G_ABS, G_SMIN, G_SMAX, G_UMIN, G_UMAX   Mirko Brkusanin via Phabricator via llvm-commits
• [PATCH] D155867: [AMDGPU][GlobalISel] Update applyMappingImpl for G_ABS and type v2s16   Mirko Brkusanin via Phabricator via llvm-commits
• [lld] ca35a19 - [lld] Synthesize metadata for MTE globals   Mitch Phillips via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [llvm] 0b1d1cd - [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Momchil Velikov via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D157116: [AArch64] Pre-commit some tests for D152828 (NFC)   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156118: [lldb][AArch64] Add reading of TLS tpidr register from core files   Muhammad Omair Javaid via Phabricator via llvm-commits
• [llvm] 59afd29 - [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF (D156136)   NAKAMURA Takumi via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156769: [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156769: [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF   NAKAMURA Takumi via Phabricator via llvm-commits
• [llvm] b6c220d - [llvm][NFC] Adjust mem fn auto upgrade detection   Nathan Sidwell via llvm-commits
• [llvm] 04333e8 - [llvm][NFC] Use CreateMemTransferInst more   Nathan Sidwell via llvm-commits
• [PATCH] D156575: [llvm[NFC] Adjust mem fn auto upgrade detection   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156575: [llvm[NFC] Adjust mem fn auto upgrade detection   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156600: [llvm][NFC] Make test less brittle   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156600: [llvm][NFC] Make test less brittle   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156600: [llvm][NFC] Make test less brittle   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156991: [llvm][NFC] Use CreateMemTransferInst more   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156991: [llvm][NFC] Use CreateMemTransferInst more   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156575: [llvm[NFC] Adjust mem fn auto upgrade detection   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156292: [PowerPC] Support initial-exec TLS relocation on AIX   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D153206: [PPC32] Parse bl __tls_get_addr(x at tlsgd)@plt+32768   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156916: [CodeGen] Improve speed of ComplexDeinterleaving pass   Nicholas Guy via Phabricator via llvm-commits
• [PATCH] D156204: [PowerPC][MC] Recognize tlbilx and its mnemonics   Nick Desaulniers via Phabricator via llvm-commits
• [PATCH] D155028: [ConstantHoisting] add XFAIL test case   Nick Desaulniers via Phabricator via llvm-commits
• [llvm] d9c53a6 - [gn] port 5656d7971b39 (llvm-tapi-diff -> llvm-readtapi)   Nico Weber via llvm-commits
• [llvm] 189be3d - [gn] port 668e33c640 (driver_execs for llvm-dwp, llvm-libtool-darwin, sancov)   Nico Weber via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Nico Weber via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Nico Weber via Phabricator via llvm-commits
• [PATCH] D157038: ASan: Add additional wcs* interceptors on Windows   Nicole Mazzuca via Phabricator via llvm-commits
• [llvm] 063b37e - Reapply [IR] Mark and/or constant expressions as undesirable   Nikita Popov via llvm-commits
• [llvm] 4189584 - [InstCombine] Only perform one iteration   Nikita Popov via llvm-commits
• [llvm] 09156b3 - [InstCombine] Move worklist preparation into InstCombinerImpl (NFC)   Nikita Popov via llvm-commits
• [llvm] 72ec2c0 - [InstCombine] Fix handling of irreducible loops (PR64259)   Nikita Popov via llvm-commits
• [llvm] eb9fce0 - Revert "[InstSimplify] Remove the remainder loop if we know the mask is always true"   Nikita Popov via llvm-commits
• [llvm] c5592f7 - [InstCombine] Fix use after free when removing unreachable code (PR64235)   Nikita Popov via llvm-commits
• [llvm] 740b8c0 - [InstCombine] Make test more robust (NFC)   Nikita Popov via llvm-commits
• [llvm] a7b9548 - [SLP] Avoid branch on undef in test (NFC)   Nikita Popov via llvm-commits
• [llvm] 7c64449 - [LoopVectorize] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] e9e2983 - [LoopSimplify] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] d01aec4 - [InstCombine] Set dead phi inputs to poison in more cases   Nikita Popov via llvm-commits
• [PATCH] D156633: [InstSimplify] Add some basic simplifications for `llvm.ptrmask`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156304: [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156657: [ValueTracking][InstCombine] Fold icmp(constants[x]) when the range of x is given   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156619: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition tests   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D105671: [Intrinsics][ObjC] Mark objc_retain and friends as thisreturn.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D153638: [CodeGenPrepare][NFC] Update the dominator tree instead of rebuilding it   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156735: Do not let Value::stripPointerCasts() look through returned arg functions.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156739: Drop some typed pointer handling   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156657: [InstCombine] Fold icmp(constants[x]) when the range of x is given   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156789: [TailCallElim] Regenerate test checks with --function-signature (NFC)   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156793: [TailCallElim] Remove the readonly attribute of byval.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156667: GlobalISel: Don't expand stacksave/stackrestore in IRTranslator   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types that are a power of 2   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D157017: [RISCV][GlobalISel] Legalize logical instructions for nonpow 2 types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D157019: [RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D157023: [RISCV][GlobalISel] Legalize G_ICMP and G_SELECT   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D157023: [RISCV][GlobalISel] Legalize G_ICMP and G_SELECT   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156776: [X86] Add more tests for `isKnownNeverZero`;   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154804: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154868: [DAGCombiner] Extend `combineFMulOrFDivWithIntPow2` to work for non-splat float vecs   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156633: [InstSimplify] Add some basic simplifications for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156633: [InstSimplify] Add some basic simplifications for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156633: [InstSimplify] Add some basic simplifications for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156633: [InstSimplify] Add some basic simplifications for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156840: [CaptureTracking] Add tests for allowing non-void `noalias` return funcs to be non-capturing; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156841: [CaptureTracking] Allow non-void `noalias` return funcs to be non-capturing   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156842: [Inliner] Add more tests for deducing return attributes of callsites when inlining; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156843: [Inliner] Add the callsites called function return attributes to set addable attributes   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156844: [Inliner] Add return attributes to callsites not marked `willreturn`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156845: [ConstantRange] Calculate precise range for shl by -1   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156840: [CaptureTracking] Add tests for allowing non-void `noalias` return funcs to be non-capturing; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156840: [CaptureTracking] Add tests for allowing non-void `noalias` return funcs to be non-capturing; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156841: [CaptureTracking] Allow non-void `noalias` return funcs to be non-capturing   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the isNonNegative for Power2 value   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine][NFC] Fix typo   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156776: [X86] Add more tests for `isKnownNeverZero`;   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156776: [X86] Add more tests for `isKnownNeverZero`;   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154804: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154868: [DAGCombiner] Extend `combineFMulOrFDivWithIntPow2` to work for non-splat float vecs   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine][NFC] Fix typo   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156811: [InstCombine] Fold `select` of `srem` and conditional add   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156776: [X86] Add more tests for `isKnownNeverZero`;   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D157014: [DAGCombiner][X86] Guard `(X & Y) ==/!= Y` --> `(X & Y) !=/== 0` behind TLI preference   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154804: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154868: [DAGCombiner] Extend `combineFMulOrFDivWithIntPow2` to work for non-splat float vecs   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156881: [InstSimplify] Check the NonZero for power of two value   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D157030: InstCombine: Fold out scale-if-denormal pattern   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156776: [X86] Add more tests for `isKnownNeverZero`;   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D157014: [DAGCombiner][X86] Guard `(X & Y) ==/!= Y` --> `(X & Y) !=/== 0` behind TLI preference   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154804: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154868: [DAGCombiner] Extend `combineFMulOrFDivWithIntPow2` to work for non-splat float vecs   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D157187: [InstCombine] Propagate the nuw/nsw for instruction neg-sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D157110: llvm-cov: __cxx_global_var_init functions disrupt coverage   Oleksii Odynochenko via Phabricator via llvm-commits
• [llvm] f2e7285 - [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D154119: Fix: Distinguish CFI Metadata Checks in MergeFunctions Pass   Oskar Wirga via Phabricator via llvm-commits
• [llvm] 89e25a3 - [Transforms][LICM] A test case for the upcoming fix D152281 for the issue with reassociation profitability   Paul Osmialowski via llvm-commits
• [llvm] 8698d56 - [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152282: [Transforms][LICM] A test case for the upcoming fix D152281 for the issue with reassociation profitability   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Walker via Phabricator via llvm-commits
• [PATCH] D155218: [InstCombine] Optimize addition/subtraction operations of splats of vscale multiplied by a constant   Paul Walker via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   Paul Walker via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Paul Walker via Phabricator via llvm-commits
• [PATCH] D157094: [CodeGen] Pre-commit tests showing incorrect pattern FMLA_* pseudo instructions   Paul Walker via Phabricator via llvm-commits
• [PATCH] D157095: [CodeGen] Fix incorrect pattern FMLA_* pseudo instructions   Paul Walker via Phabricator via llvm-commits
• [llvm] 8f3b87f - [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156661: [SPIRV] Add support for SPV_KHR_bit_instructions   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156661: [SPIRV] Add support for SPV_KHR_bit_instructions   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [llvm] 37ef640 - [llvm-exegesis] Prevent llvm-exegesis from using unsupported opcodes   Pavel Kosov via llvm-commits
• [PATCH] D146303: [llvm-exegesis] Prevent llvm-exegesis from using unsupported opcodes   Pavel Kosov via Phabricator via llvm-commits
• [PATCH] D154522: [DAG] Improve combineCarryDiamond to accept (uaddo_carry X, 0, Carry)   Paweł Bylica via Phabricator via llvm-commits
• [PATCH] D157091: AMDGPU/Uniformity/GlobalISel: G_AMDGPU atomics are always divergent   Petar Avramovic via Phabricator via llvm-commits
• [llvm] 1978482 - gn build: Fix Android build.   Peter Collingbourne via llvm-commits
• [PATCH] D146266: gn build: Fix Android build.   Peter Collingbourne via Phabricator via llvm-commits
• [PATCH] D148854: [llvm-stress] Switch to a FuzzMutate driver   Peter Rong via Phabricator via llvm-commits
• [PATCH] D156758: [dsymutil][dwp][libtool-darwin][sancov] Enable llvm-driver   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D156758: [dwp][libtool-darwin][sancov] Enable llvm-driver   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Petr Hosek via Phabricator via llvm-commits
• [llvm] e93a813 - [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF (try 2)   Philip Reames via llvm-commits
• [llvm] e938217 - [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Philip Reames via llvm-commits
• [llvm] 1e86abc - [RISCVRVVInitUndef] Ignore tied use for partial undef register   Philip Reames via llvm-commits
• [llvm] fe4c99d - [RISCV] Add test case showing CSE regression from issue 64282   Philip Reames via llvm-commits
• [llvm] 660b740 - [DAG] Support store merging of vector constant stores   Philip Reames via llvm-commits
• [llvm] 9f4a2a8 - [RISCV] Separate lowering of constant build vector into a helper [nfc]   Philip Reames via llvm-commits
• [PATCH] D156477: [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156709: [RISCVRVVInitUndef] Ignore tied use for partial undef register   Philip Reames via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Philip Reames via Phabricator via llvm-commits
• [PATCH] D155041: [RISCV] Remove unnecessary move of undefined with subregister liveness enabled   Philip Reames via Phabricator via llvm-commits
• [PATCH] D155041: [RISCV] Remove unnecessary move of undefined with subregister liveness enabled   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156477: [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156249: [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156709: [RISCVRVVInitUndef] Ignore tied use for partial undef register   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156830: [RISCV] Copy memoperands in some of the post isel peepholes.   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156909: [RISCV] Use NoReg in place of IMPLICIT_DEF for undefined passthru operands   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156883: [RISCV] Implement support for bf16 selects when zfbfmin is enabled   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156349: [DAG] Support store merging of vector constant stores   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156349: [DAG] Support store merging of vector constant stores   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156349: [DAG] Support store merging of vector constant stores   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156909: [RISCV] Use NoReg in place of IMPLICIT_DEF for undefined passthru operands   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156926: [RISCV] Add bf16 to isFPImmLegal.   Philip Reames via Phabricator via llvm-commits
• [PATCH] D157117: [RISCV] Use vmerge for INSERT_VECTOR_ELT w/small constant indices   Philip Reames via Phabricator via llvm-commits
• [PATCH] D157120: [RISCV] Use v(f)slide1down for build_vector with dominant values   Philip Reames via Phabricator via llvm-commits
• [PATCH] D152001: [RISCV][SLP] Inflate insert/extract costs on very small vectors   Philip Reames via Phabricator via llvm-commits
• [PATCH] D157009: [SLP]Fix PR63854: Add proper sorting of pointers for masked stores.   Philip Reames via Phabricator via llvm-commits
• [PATCH] D157132: [RISCVGatherScatterLowering] Support broadcast base pointer   Philip Reames via Phabricator via llvm-commits
• [PATCH] D157009: [SLP]Fix PR63854: Add proper sorting of pointers for masked stores.   Philip Reames via Phabricator via llvm-commits
• [llvm] 4d6f4c9 - [X86] Special handle for v1i1 during ExtractBitFromMaskVector   Phoebe Wang via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156855: [X86] Special handle for v1i1 during ExtractBitFromMaskVector   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156855: [X86] Special handle for v1i1 during ExtractBitFromMaskVector   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156855: [X86] Special handle for v1i1 during ExtractBitFromMaskVector   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156963: [X86] Workaround possible CPUID bug in Sandy Bridge.   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156708: AMDGPU: Consider nobuiltin when querying defined libfuncs   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156972: [DAG] Fix crash in replaceStoreOfInsertLoad   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156973: [AMDGPU] Add extended-image-insts to RemoveIncompatibleFunctions   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156973: [AMDGPU] Add extended-image-insts to RemoveIncompatibleFunctions   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156972: [DAG] Fix crash in replaceStoreOfInsertLoad   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D146023: [AMDGPU] Remove Code Object V2   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D157085: [TableGen] Do not compile CombineRuleBuilder::verify in release builds   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D157085: [TableGen] Do not compile CombineRuleBuilder::verify in release builds   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156669: AMDGPU: Handle llvm.stacksave and llvm.stackrestore   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156670: AMDGPU/GlobalISel: Handle stacksave/stackrestore   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156998: [NFC] Pre-commit test for dead bundle bug   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156998: [NFC] Pre-commit test for dead bundle bug   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.4   Piotr Zegar via Phabricator via llvm-commits
• [llvm] 05041b7 - [RISCV] emit .option directive for functions with target features which differ from module default   Piyou Chen via llvm-commits
• [PATCH] D156709: [RISCVRVVInitUndef] Ignore tied use for partial undef register   Piyou Chen via Phabricator via llvm-commits
• [PATCH] D155041: [RISCV] Remove unnecessary move of undefined with subregister liveness enabled   Piyou Chen via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Piyou Chen via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Piyou Chen via Phabricator via llvm-commits
• [PATCH] D156647: [AMDGPU] Extend f32 support for llvm.amdgcn.update.dpp intrinsic   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156647: [AMDGPU] Extend f32 support for llvm.amdgcn.update.dpp intrinsic   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [AMDGPU] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156647: [AMDGPU] Extend f32 support for llvm.amdgcn.update.dpp intrinsic   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D152714: [AArch64][Optimization]Emit FCCMP for AND of two float compares   Priyanshi Agarwal via Phabricator via llvm-commits
• [PATCH] D152714: [AArch64][Optimization]Emit FCCMP for AND of two float compares   Priyanshi Agarwal via Phabricator via llvm-commits
• [PATCH] D155617: [WIP] GSoC 2023: Pass to annotate functions with appropriate optimization level.   Puneeth via Phabricator via llvm-commits
• [PATCH] D155617: [WIP] GSoC 2023: Pass to annotate functions with appropriate optimization level.   Puneeth via Phabricator via llvm-commits
• [PATCH] D23727: [Profile] SelectInst instrumentation Support in IR-PGO   Qiongsi Wu via Phabricator via llvm-commits
• [llvm] 53648ac - [PowerPC][MC] Recognize tlbilx and its mnemonics   Qiu Chaofan via llvm-commits
• [PATCH] D156204: [PowerPC][MC] Recognize tlbilx and its mnemonics   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D156292: [PowerPC] Support initial-exec TLS relocation on AIX   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D156292: [PowerPC] Support initial-exec TLS relocation on AIX   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154922: [BOLT] fix the endless loop of --iterative-guess   Rafael Auler via Phabricator via llvm-commits
• [PATCH] D147544: [BOLT] Move from RuntimeDyld to JITLink   Rafael Auler via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Raghu via Phabricator via llvm-commits
• [compiler-rt] 679c076 - [sanitizer_common] Remove hacks for __builtin_return_address abuse on SPARC   Rainer Orth via llvm-commits
• [PATCH] D156504: [sanitizer_common] Remove hacks for __builtin_return_address abuse on SPARC   Rainer Orth via Phabricator via llvm-commits
• [PATCH] D156504: [sanitizer_common] Remove hacks for __builtin_return_address abuse on SPARC   Rainer Orth via Phabricator via llvm-commits
• [PATCH] D156504: [sanitizer_common] Remove hacks for __builtin_return_address abuse on SPARC   Rainer Orth via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.   Roger Ferrer Ibanez via Phabricator via llvm-commits
• [PATCH] D157189: [llvm-exegesis] Don't try to use SYS_rseq if it's not defined.   Romain Geissler via Phabricator via llvm-commits
• [PATCH] D157189: [llvm-exegesis] Don't try to use SYS_rseq if it's not defined.   Romain Geissler via Phabricator via llvm-commits
• [PATCH] D123496: [RISCV] Add Stackmap/Statepoint/Patchpoint support without targets   Sacha Coppey via Phabricator via llvm-commits
• [PATCH] D151107: [IR] Add GraalVM calling conventions   Sacha Coppey via Phabricator via llvm-commits
• [llvm] 05d613e - [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Saleem Abdulrasool via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Saleem Abdulrasool via Phabricator via llvm-commits
• [PATCH] D155732: [MC][COFF][AArch64] Avoid incorrect IMAGE_REL_ARM64_BRANCH26 relocations.   Saleem Abdulrasool via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Saleem Abdulrasool via Phabricator via llvm-commits
• [PATCH] D157136: [LLD][COFF] Handle 'label' symbols when they point to a COMDAT section   Saleem Abdulrasool via Phabricator via llvm-commits
• [PATCH] D57896: Variable names rule   Sam Clegg via Phabricator via llvm-commits
• [PATCH] D156781: Use the canonical path for the include header search.   Sam McCall via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   Sam Tebbs via Phabricator via llvm-commits
• [PATCH] D152714: [AArch64][Optimization]Emit FCCMP for AND of two float compares   Sam Tebbs via Phabricator via llvm-commits
• [llvm] 93a3706 - [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via llvm-commits
• [llvm] c599cb5 - [Verifier] Check valid raw_ostream pointer before printing errors   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 466bd99 - Revert "[LLVM] move verification of convergence control to a class template"   Sameer Sahasrabuddhe via llvm-commits
• [llvm] d3718f1 - [LLVM] remove extern template declarations of GenericCycleInfo   Sameer Sahasrabuddhe via llvm-commits
• [llvm] bd7a4d7 - Restore "[LLVM] move verification of convergence control to a class template""   Sameer Sahasrabuddhe via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156682: AMDGPU: Partially respect nobuiltin in libcall simplifier   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156682: AMDGPU: Partially respect nobuiltin in libcall simplifier   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive   Sandeep via Phabricator via llvm-commits
• [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive   Sandeep via Phabricator via llvm-commits
• [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D155957: [PPC][AIX] Fix toc-data peephole bug and some related cleanup.   Sean Fertile via Phabricator via llvm-commits
• [PATCH] D157079: [TableGen] Fix wrong lex result on 64-bit integer boundaries   Senran Zhang via Phabricator via llvm-commits
• [PATCH] D156978: [symbolizer][NFC] Move file argument parsing into separate function   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D156989: FloatingPointMode: Use -1 for "Dynamic"   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D156978: [symbolizer][NFC] Move file argument parsing into separate function   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D156978: [symbolizer][NFC] Move file argument parsing into separate function   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D156978: [symbolizer][NFC] Move file argument parsing into separate function   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D157203: [symbolizer][NFC] Reorganize parsing input binary file   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D157210: [symbolizer] Change reaction on invalid input   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D157210: [symbolizer] Change reaction on invalid input   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D155943: [NFC] Update formatting of some symbolizer tests   Serge Pavlov via Phabricator via llvm-commits
• [llvm] aeeaadd - [SystemZ] Replace OperandMatchResultTy with ParseStatus (NFC)   Sergei Barannikov via llvm-commits
• [PATCH] D154316: [SystemZ] Replace OperandMatchResultTy with ParseStatus (NFC)   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D144936: [SPARC][IAS] Add support for v9 DONE, RETRY, SAVED, & RESTORED   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D157230: [SPARC][IAS] Add SETX pseudoinstruction   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D157231: [SPARC][IAS] Add definitions for v9 State Registers   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D157232: [SPARC][IAS] Add v9 encoding of %fq   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D144936: [SPARC][IAS] Add support for v9 DONE, RETRY, SAVED, & RESTORED   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D157234: [SPARC][IAS] Add support for the full set of CAS instructions   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D157236: [SPARC][IAS] Add more instruction aliases   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D156734: [BOLT] Fixing macOS build   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D156734: [BOLT] Fixing macOS build   Sergey Pupyrev via Phabricator via llvm-commits
• [llvm] 65e80d6 - [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [llvm] c171ed4 - [OpenMP] Fix the linkage for kernel environment global variable   Shilei Tian via llvm-commits
• [PATCH] D156955: [OpenMP] Fix the linkage for kernel environment global variable   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D156955: [OpenMP] Fix the linkage for kernel environment global variable   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D156955: [OpenMP] Fix the linkage for kernel environment global variable   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for critical region lock   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D156955: [OpenMP] Fix the linkage for kernel environment global variable   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for internal variables   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D157040: [OpenMP][IR] Set correct alignment for internal variables   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D142569: [OpenMP] Introduce kernel environment   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D157036: Emit a .debug_str_offsets section with dsymutil to support DW_FORM_strx in dsymutil.   Shubham Sandeep Rastogi via Phabricator via llvm-commits
• [PATCH] D156702: Add support for GEP of GEP instruction combining when types do not exactly match   Simeon Krastnikov via Phabricator via llvm-commits
• [llvm] 076bee1 - [DAG] getNode() - fold (zext (trunc (assertzext x))) -> (assertzext x)   Simon Pilgrim via llvm-commits
• [llvm] c1c86f9 - [X86] LowerEXTRACT_VECTOR_ELT - match i8 extraction with MVT::i8 instead of getSizeInBits()   Simon Pilgrim via llvm-commits
• [llvm] 071671e - [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via llvm-commits
• [llvm] 17ecb55 - [AMDGPU] AMDGPUTargetStreamer::getArchNameFromElfMach - use GPUKind::GK_NONE for unknown AMDGPU ElfMach flags   Simon Pilgrim via llvm-commits
• [llvm] 5ccfa15 - [lit] abs_path_preserve_drive - don't normalize path, leave this to the caller   Simon Pilgrim via llvm-commits
• [llvm] d6f1880 - [lit] Add missing os.path.normcase() to config-map-discovery test   Simon Pilgrim via llvm-commits
• [llvm] 7f9b94c - [X86] LowerBuildVectorv16i8 - attempt to merge lowest 2 x i16 insertions into a i32 MOVD scalar_to_vectpr   Simon Pilgrim via llvm-commits
• [llvm] 4dcf687 - [X86] combineAnd - limit and(extract_vector_elt(shuffle(x)) -> extract_vector_elt(shuffle'(x)) fold to one use of the extract_vector_elt.   Simon Pilgrim via llvm-commits
• [llvm] e229086 - [X86] ReplaceNodeResults - widen sub-128-bit vector truncations if it would allow them to use PACKSS/PACKUS   Simon Pilgrim via llvm-commits
• [llvm] ef4330f - [X86] truncateVectorWithPACK - handle vector truncations to sub-64-bit vector widths   Simon Pilgrim via llvm-commits
• [llvm] ce2ec06 - [X86] Only fold broadcast with extract_vector_elt/scalar_to_vector if the scalar type matches the vector element type   Simon Pilgrim via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits (WIP)   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154738: [SLP]Introduce isLegalVectorOp to check if the vector instruction is going to be scalarized.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156855: [X86] Special handle for v1i1 during ExtractBitFromMaskVector   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156855: [X86] Special handle for v1i1 during ExtractBitFromMaskVector   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D157014: [DAGCombiner][X86] Guard `(X & Y) ==/!= Y` --> `(X & Y) !=/== 0` behind TLI preference   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156778: [SelectionDAG] Improve `isKnownToBeAPowerOfTwo`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156776: [X86] Add more tests for `isKnownNeverZero`;   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D157098: [VectorCombine][NFC][test] Add tests for the 'foldSingleElementStore' transform   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154841: [AIC] Fix the sext cost operands in tryToFPToSat   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D157218: [MCA] Fix typo in comments   Simon Pilgrim via Phabricator via llvm-commits
• [llvm] 60b9836 - Retain all jump table range checks when using BTI.   Simon Tatham via llvm-commits
• [llvm] f17601b - [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Simon Tatham via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156868: [ARM] Permit VGETLNi32 and VSETLNi32 without mnemonic suffix.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156968: [ARM] v6-M XO: save CPSR around LoadStackGuard   Simon Wallis via Phabricator via llvm-commits
• [PATCH] D156968: [ARM] v6-M XO: save CPSR around LoadStackGuard   Simon Wallis via Phabricator via llvm-commits
• [PATCH] D156968: [ARM] v6-M XO: save CPSR around LoadStackGuard   Simon Wallis via Phabricator via llvm-commits
• [llvm] 0c7e8c0 - [AMDGPU] Change syncscopes.mir not to use undefined cpol bits. NFC.   Stanislav Mekhanoshin via llvm-commits
• [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D156853: [AMDGPU] Add metadata to track preloaded arguments   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D156852: [AMDGPU] Use inreg for hint to preload kernel arguments   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D157100: [AMDGPU] Validate GDS in the assembler   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D157226: Fix typos in comments of ExecutionEngine/   Stefan Gränitz via Phabricator via llvm-commits
• [llvm] cce3599 - [Object] Fix grammar mistake in the comment   Steven Wu via llvm-commits
• [llvm] 42c9354 - Revert "Reland "[LoongArch] Support -march=native and -mtune=""   Steven Wu via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Steven Wu via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Steven Wu via Phabricator via llvm-commits
• [PATCH] D133716: [CAS] Add LLVMCAS library with InMemoryCAS implementation   Steven Wu via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Steven Wu via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Steven Wu via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Steven Wu via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Steven Wu via Phabricator via llvm-commits
• [llvm] 5c98617 - [JITLink] Add public APIs for getting stub creation functions.   Sunho Kim via llvm-commits
• [PATCH] D155557: [JITLink] Add public APIs for getting stub creation functions.   Sunho Kim via Phabricator via llvm-commits
• [PATCH] D155557: [JITLink] Add public APIs for getting stub creation functions.   Sunho Kim via Phabricator via llvm-commits
• [llvm] f2bd784 - [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Tamir Duberstein via llvm-commits
• [llvm] 82bc183 - [BPF] Narrow some interfaces   Tamir Duberstein via llvm-commits
• [llvm] 6b5e486 - Revert "[BPF] Narrow some interfaces"   Tamir Duberstein via llvm-commits
• [llvm] 055893b - [BPF] Don't crash on missing line info   Tamir Duberstein via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156769: [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156769: [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156769: [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156769: [BPF] Match CHECK w/ LLVM_ENABLE_ASSERTIONS=OFF   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Don't crash on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Tamir Duberstein via Phabricator via llvm-commits
• [llvm] 65e57bb - [FunctionImport] Reduce string duplication (NFC)   Teresa Johnson via llvm-commits
• [PATCH] D155904: [Docs][llvm-link] Add documentation an CLI options   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156730: [LTO] Remove module id from summary index   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156580: [FunctionImport] Reduce string duplication (NFC)   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156691: [PEI][WebAssembly] Switch to backwards frame index elimination   Thomas Lively via Phabricator via llvm-commits
• [PATCH] D156691: [PEI][WebAssembly] Switch to backwards frame index elimination   Thomas Lively via Phabricator via llvm-commits
• [PATCH] D150880: [RFC, FileCheck, 3/4] Allow AP value for numeric expressions   Thomas Preud'homme via Phabricator via llvm-commits
• [PATCH] D157144: [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).   Thorsten via Phabricator via llvm-commits
• [PATCH] D157144: [VPlan] Replace FMF in VPInstruction with VPRecipeWithIRFlags (NFC).   Thorsten via Phabricator via llvm-commits
• [PATCH] D157202: [AArch64][GISel] Fix selection of G_CONSTANT_FOLD_BARRIER   Thorsten via Phabricator via llvm-commits
• [PATCH] D157202: [AArch64][GISel] Fix selection of G_CONSTANT_FOLD_BARRIER   Thorsten via Phabricator via llvm-commits
• [PATCH] D156614: [AArch64][GISel] Handling for G_VECREDUCE_FMIN and G_VECREDUCE_FMAX   Thorsten via Phabricator via llvm-commits
• [PATCH] D156649: [AArch64] Add some basic handling for bf16 constants.   Ties Stuij via Phabricator via llvm-commits
• [PATCH] D156968: [ARM] v6-M XO: save CPSR around LoadStackGuard   Ties Stuij via Phabricator via llvm-commits
• [PATCH] D138883: [SelectionDAG][PowerPC] Memset reuse vector element for tail store   Ting Wang via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Tobias Gysi via Phabricator via llvm-commits
• [PATCH] D156889: [mlir][cf] Add ControlFlow to SCF lifting pass   Tobias Gysi via Phabricator via llvm-commits
• [PATCH] D156873: [Workflow] Run the repository sync script from GH.   Tobias Hieta via Phabricator via llvm-commits
• [PATCH] D156873: [Workflow] Run the repository sync script from GH.   Tobias Hieta via Phabricator via llvm-commits
• [PATCH] D156595: Workflows: Allow pull requests for .github directory   Tom Stellard via Phabricator via llvm-commits
• [PATCH] D154223: [llvm-cov] Allow multiple remaps in --path-equivalence   Tomas Camin via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D157059: [lldb][PECOFF] Exclude alignment padding when reading section data   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D155484: [AArch64] Global Isel Funnel Shift Lowering   Tuan Chuong Goh via Phabricator via llvm-commits
• [PATCH] D157113: [AArch64] Support more types for ZEXT/SEXT with Global Isel   Tuan Chuong Goh via Phabricator via llvm-commits
• [PATCH] D154316: [SystemZ] Replace OperandMatchResultTy with ParseStatus (NFC)   Ulrich Weigand via Phabricator via llvm-commits
• [PATCH] D156379: [SystemZ] Avoid type legalization on structs   Ulrich Weigand via Phabricator via llvm-commits
• [PATCH] D142796: Flang semantic check support for tile and unroll OpenMP Directive.   Valentin Clement via Phabricator via llvm-commits
• [PATCH] D155246: [SLP]Improve stores vectorization.   Valeriy Dmitriev via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Varun Kumar E via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Varun Kumar E via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Varun Kumar E via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Varun Kumar E via Phabricator via llvm-commits
• [PATCH] D156953: PowerPC 32bit: Emit relocation type R_PPC_DTPREL32 for tls variablels.   Varun Kumar E via Phabricator via llvm-commits
• [llvm] 259d56d - [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Vedant Paranjape via llvm-commits
• [PATCH] D156304: [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D156304: [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D156304: [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D152278: [SCEV] Compute SCEV for ashr(add(shl(x, n), c), m) instr triplet   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156685: [RISCV] Match ext_vl + ext_vl + srem + trunc_vl to vrem.vv   Vettel via Phabricator via llvm-commits
• [PATCH] D156685: [RISCV] Match ext_vl + ext_vl + srem + trunc_vl to vrem.vv   Vettel via Phabricator via llvm-commits
• [PATCH] D157012: AMDGPU/GlobalISel: insert readfirstlane on SGPR inlineasm copy   Vigneshwar Jayakumar via Phabricator via llvm-commits
• [PATCH] D157012: AMDGPU/GlobalISel: insert readfirstlane on SGPR inlineasm copy   Vigneshwar Jayakumar via Phabricator via llvm-commits
• [llvm] 0065388 - Revert "Reapply: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas"""   Vitaly Buka via llvm-commits
• [llvm] 6ee9de7 - [test][MemCpyOpt] Regression test for D153453   Vitaly Buka via llvm-commits
• [llvm] 2772c26 - [test][MemCpyOpt] Update D153453 test   Vitaly Buka via llvm-commits
• [llvm] df0b1df - [test][MemCpyOpt] Update D153453 test   Vitaly Buka via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D148043: [InferAttrs] Mark frexp and modf as memory(argmem: write)   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D153453: [MemCpyOpt] implement single BB stack-move optimization which unify the static unescaped allocas   Vitaly Buka via Phabricator via llvm-commits
• [llvm] 19d7ab1 - [GlobalISel] Handle sequences of trunc(sext/zext/anyext...) in artifact combiner   Vladislav Dzhidzhoev via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D156831: [AArch64][GlobalISel] Legalize integer across-lane intrinsics with actual type   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle trunc(sext x) in artifact combiner   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D156831: [AArch64][GlobalISel] Legalize integer across-lane intrinsics with actual type   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle trunc(sext x) in artifact combiner   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D156832: [GlobalISel] Handle sequences of trunc(sext/zext/anyext...) in artifact combiner   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [lld] 5ba9063 - [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via llvm-commits
• [lld] cd29ebb - [lld-macho][nfc]Add REQUIRES arch in test to fix breakages in D156468   Vy Nguyen via llvm-commits
• [PATCH] D156468: [lld-macho]Avoid crashing in predicate functions.   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D157027: [lld-macho][nfc]Add bounds check before attempting to dereferencing iterators.   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D157027: [lld-macho][nfc]Add bounds check before attempting to dereferencing iterators.   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho] Fixed crashes when linking with incompatible-arch archives/   Vy Nguyen via Phabricator via llvm-commits
• [PATCH] D156500: [RISCV] Fix typo in C9LeftShift   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156432: [RISCV][NFC] Use !format to simplify some code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156810: [RISCV] Call combineSelectToBinOp before generic select expansion for Zicond.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D152998: [TableGen] Support named arguments   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156966: [TableGen] Improve error report of unspecified arguments   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D152998: [TableGen] Support named arguments   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156966: [TableGen] Improve error report of unspecified arguments   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156966: [TableGen] Improve error report of unspecified arguments   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156966: [TableGen] Improve error report of unspecified arguments   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D151850: [RISCV] Model all 3 arithmetic sources of vector FMA at MC layer.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D157176: [RISCV] Refactor to reduce some duplication in RISCVInstrInfoV.td. NFC   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155417: [DominanceFrontier] fix addToFrontier to use insert   Wenju He via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D157061: [SampleProfile] Potential use after move in SampleProfileLoader::promoteMergeNotInlinedContextSamples   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D156772: [lld][LoongArch] Support the R_LARCH_PCREL20_S2 relocation type   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D153107: [llvm-c] Add LLVMSetTailCallKind and LLVMGetTailCallKind   YAMAMOTO Takashi via Phabricator via llvm-commits
• [llvm] 3dc413e - [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via Phabricator via llvm-commits
• [PATCH] D156893: [AMDGPU] Skip debug instruction uses while optimizing live range of a reg in SIOptimizeVGPRLiveRange   Yashwant Singh via Phabricator via llvm-commits
• [PATCH] D156696: AMDGPU: Add more tests for sincos recognition   Yaxun Liu via Phabricator via llvm-commits
• [PATCH] D156720: AMDGPU: Try to use private version of sincos if available   Yaxun Liu via Phabricator via llvm-commits
• [PATCH] D156071: [HIP] Update compile options   Yaxun Liu via Phabricator via llvm-commits
• [llvm] 4c8cf92 - [RISCV] Use the first element of source as the start value of reduction.   Yeting Kuo via llvm-commits
• [llvm] cd79599 - [RISCV] Teach lowerScalarInsert to handle scalar value is the first element of a fixed vector.   Yeting Kuo via llvm-commits
• [llvm] f68c687 - [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push/pop.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156748: [RISCV] Add no NaN support to lowerFMAXIMUM_FMINIMUM.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Fix the CFI offset for callee-saved registers stored by Zcmp push.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156863: [RISCV] Teach lowerScalarInsert to handle scalar value is the first element of a fixed vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156863: [RISCV] Teach lowerScalarInsert to handle scalar value is the first element of a fixed vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156863: [RISCV] Teach lowerScalarInsert to handle scalar value is the first element of a fixed vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156937: [RISCV] Add vector legalization for fmaximum/fminimum.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Refine getMaxPushPopReg like getLibCallID. NFC.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] Emit UNDEF rather than constant 0   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D140804: [BPF] support for BPF_ST instruction in codegen   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D157250: [RISCV] Enable alias analysis by default   Yunze Zhu(Thead) via Phabricator via llvm-commits
• [PATCH] D153907: [AIX] [TOC] Add -mtocdata/-mno-tocdata options on AIX   Zaara Syeda via Phabricator via llvm-commits
• [PATCH] D156515: [RemarkUtil] Refactor llvm-remarkutil to include size-diff   Zain Jaffal via Phabricator via llvm-commits
• [PATCH] D156869: Remark Util intoduce remark count   Zain Jaffal via Phabricator via llvm-commits
• [PATCH] D155187: [RemarkUtil] Add an option to collect remark count information given a list of keys.   Zain Jaffal via Phabricator via llvm-commits
• [compiler-rt] 4b08be7 - Revert "[Profile] Remove duplicate file locks when enabled continuous mode and online merging."   Zequan Wu via llvm-commits
• [compiler-rt] 98dec28 - Reland [Profile] Remove duplicate file locks when enabled continuous mode and online merging.   Zequan Wu via llvm-commits
• [compiler-rt] 8cee818 - [Profile] Fix 98dec28458172091893e46040d7b5ab745a44b82   Zequan Wu via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156780: [CSKY] Optimize 'llvm.cttz.i32' and 'llvm.ctlz.i32'   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156967: [PoC][SelectionDAG] Upgrade the MatcherTable type from unsigned char to unsigned short   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156967: [SelectionDAG] Encode CheckPatternPredicate num in VBR format to expand the range it can represents   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156967: [SelectionDAG] Encode CheckPatternPredicate num in VBR format to expand the range it can represents   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D154768: [CSKY] Optimize conditional branch and value select with BTSTI   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add stage to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156799: Update generic scheduling to use A510 scheduling model   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   hassnaaHamdi via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   hassnaaHamdi via Phabricator via llvm-commits
• [PATCH] D141931: [BOLT] Consider Code Fragments during regreassign   hezuoqiang via Phabricator via llvm-commits
• [PATCH] D156773: Increase performance of llvm-gsymutil by up to 200%.   jeffrey tan via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   mgabka via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   mgabka via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   mgabka via Phabricator via llvm-commits
• [PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE   wanglei via Phabricator via llvm-commits
• [PATCH] D156866: [Clang][LoongArch] Use the ClangBuiltin class to automatically generate support for CBE and CFE   wanglei via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   witstorm via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   witstorm via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   witstorm via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   witstorm via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   witstorm via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   witstorm via Phabricator via llvm-commits
• [PATCH] D156850: [NFC][Coroutines] Use a reverse post-order to guide the computation about cross suspend infomation to reach a fixed point faster.   witstorm via Phabricator via llvm-commits
• [PATCH] D156835: CoroFrame: Rework SuspendCrossingInfo analysis   witstorm via Phabricator via llvm-commits
• [PATCH] D154922: [BOLT] fix the endless loop of --iterative-guess   yinchengwu via Phabricator via llvm-commits
• [llvm] 19a1b67 - [RISCV] Fix typo in C9LeftShift   via llvm-commits
• [llvm] 44d14a1 - [tests] precommit tests for D154953   via llvm-commits
• [llvm] 3e386b2 - [InstSimplify] Remove the remainder loop if we know the mask is always true   via llvm-commits
• [llvm] c59bc23 - [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   via llvm-commits
• [llvm] ebf394f - [TableGen][NFC] Group tokens with same attribute togather   via llvm-commits
• [llvm] 497966f - Reland [InstSimplify] Remove the remainder loop if we know the mask is always true   via llvm-commits
• [llvm] 346c1f2 - [RISCV] Support vector crypto extension LLVM IR   via llvm-commits
• [llvm] eb69870 - [TableGen] Improve error report of unspecified arguments   via llvm-commits
• [llvm] b3b2a92 - [RISCV] Fix the predicate code of uimm6   via llvm-commits
• [llvm] 1547b81 - [RISCV][NFC] Remove unused code in RISCV/RISCVInstrInfoZvk.td   via llvm-commits
• [llvm] 62ea799 - [AMDGPU] Break Large PHIs: Take whole PHI chains into account   via llvm-commits
• [llvm] 9c837b7 - [ValueTracking] Improve the coverage of isKnownToBeAPowerOfTwo for vscale   via llvm-commits
• [llvm] 68ea002 - [InstSimplify] Check the NonZero for power of two value   via llvm-commits
• [llvm] b80ff2f - [NewGVN] Only perform symbolic evaluation on instructions (NFC)   via llvm-commits
• [llvm] 2532b68 - [TableGen] Do not compile CombineRuleBuilder::verify in release builds   via llvm-commits
• [llvm] b9a8bec - [tests] precommit tests for D156499   via llvm-commits
• [llvm] 4225f54 - [InstCombine] Fold abs of known sign operand when source is sub   via llvm-commits