[llvm] e9e2983 - [LoopSimplify] Regenerate test checks (NFC)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 1 02:43:02 PDT 2023


Author: Nikita Popov
Date: 2023-08-01T11:42:38+02:00
New Revision: e9e2983a600e0defdcb124a20a2482ef18ce5cbf

URL: https://github.com/llvm/llvm-project/commit/e9e2983a600e0defdcb124a20a2482ef18ce5cbf
DIFF: https://github.com/llvm/llvm-project/commit/e9e2983a600e0defdcb124a20a2482ef18ce5cbf.diff

LOG: [LoopSimplify] Regenerate test checks (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/LoopSimplify/ashr-crash.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/LoopSimplify/ashr-crash.ll b/llvm/test/Transforms/LoopSimplify/ashr-crash.ll
index ba4b74712dbfab..52d0c7a653da3a 100644
--- a/llvm/test/Transforms/LoopSimplify/ashr-crash.ll
+++ b/llvm/test/Transforms/LoopSimplify/ashr-crash.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt -passes='loop-mssa(loop-rotate,licm),instcombine,indvars,loop-unroll' -S %s | FileCheck %s
 ;
 ; PR18361: ScalarEvolution::getAddRecExpr():
@@ -24,15 +25,30 @@ target triple = "x86_64-apple-macosx"
 
 ; Check that the def-use chain that leads to the bad SCEV is still
 ; there.
-;
-; CHECK-LABEL: @foo
-; CHECK-LABEL: entry:
-; CHECK-LABEL: for.cond1.preheader:
-; CHECK-LABEL: for.body3:
-; CHECK: %cmp4.le.le
-; CHECK: %conv.le.le = zext i1 %cmp4.le.le to i32
-; CHECK: %xor.le.le = xor i32 %conv6.le.le, 1
 define void @foo() {
+; CHECK-LABEL: define void @foo() {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    store i32 0, ptr @d, align 4
+; CHECK-NEXT:    [[TMP0:%.*]] = load i32, ptr @c, align 4
+; CHECK-NEXT:    br label [[FOR_COND1_PREHEADER:%.*]]
+; CHECK:       for.cond1.preheader:
+; CHECK-NEXT:    br label [[FOR_BODY3:%.*]]
+; CHECK:       for.body3:
+; CHECK-NEXT:    store i32 1, ptr @a, align 4
+; CHECK-NEXT:    store i32 1, ptr @d, align 4
+; CHECK-NEXT:    [[CMP4_LE_LE:%.*]] = icmp sge i32 0, [[TMP0]]
+; CHECK-NEXT:    [[CONV_LE_LE:%.*]] = zext i1 [[CMP4_LE_LE]] to i32
+; CHECK-NEXT:    [[SEXT_LE_LE:%.*]] = shl i32 [[CONV_LE_LE]], 16
+; CHECK-NEXT:    [[CONV6_LE_LE:%.*]] = ashr exact i32 [[SEXT_LE_LE]], 16
+; CHECK-NEXT:    [[XOR_LE_LE:%.*]] = xor i32 [[CONV6_LE_LE]], 1
+; CHECK-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[XOR_LE_LE]], 0
+; CHECK-NEXT:    br i1 [[CMP10]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK:       if.then:
+; CHECK-NEXT:    store i32 0, ptr @b, align 4
+; CHECK-NEXT:    br label [[IF_END]]
+; CHECK:       if.end:
+; CHECK-NEXT:    ret void
+;
 entry:
   br label %for.cond
 


        


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