[llvm] b3b2a92 - [RISCV] Fix the predicate code of uimm6

[via llvm-commits]

Author: 4vtomat
Date: 2023-08-03T03:42:14-07:00
New Revision: b3b2a9209bd6e6dbe8fbeca455361597bb485956

URL: https://github.com/llvm/llvm-project/commit/b3b2a9209bd6e6dbe8fbeca455361597bb485956
DIFF: https://github.com/llvm/llvm-project/commit/b3b2a9209bd6e6dbe8fbeca455361597bb485956.diff

LOG: [RISCV] Fix the predicate code of uimm6

Differential Revision: https://reviews.llvm.org/D156974

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfo.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
index 91a4db0ad887d1..1dbb3832bb6045 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -237,7 +237,7 @@ def InsnDirectiveOpcode : AsmOperandClass {
   let PredicateMethod = "isImm";
 }
 
-def uimm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<6>(Imm);}]> {
+def uimm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isUInt<6>(Imm);}]> {
   let ParserMatchClass = UImmAsmOperand<6>;
   let DecoderMethod = "decodeUImmOperand<6>";
   let OperandType = "OPERAND_UIMM6";