[PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR

[Zixuan Wu via Phabricator via llvm-commits]

zixuan-wu added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:240
 
-def uimm6 : Operand<XLenVT> {
+def uimm6 : Operand<XLenVT>, ImmLeaf<XLenVT, [{return isInt<6>(Imm);}]> {
   let ParserMatchClass = UImmAsmOperand<6>;
----------------
Should it be  `[{return isUInt<6>(Imm);}]`? @4vtomat 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138809/new/

https://reviews.llvm.org/D138809