[PATCH] D157067: [RISCV] Set the vector calling convention if any of input type or return type is vector

Brandon Wu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 3 20:57:51 PDT 2023 

4vtomat created this revision.
Herald added subscribers: jobnoorman, luke, VincentWu, armkevincheng, sjarus, eric-k256, vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, arichardson, qcolombet.
Herald added a project: All.
4vtomat requested review of this revision.
Herald added subscribers: llvm-commits, wangpc, eopXD, MaskRay.
Herald added a project: LLVM.

Depends on D154576 <https://reviews.llvm.org/D154576>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D157067

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
  llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
  llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
  llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll
  llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
  llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
  llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
  llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptosi-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptoui-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-load.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sitofp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-uitofp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfneg-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsqrt-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp.ll
  llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
  llvm/test/CodeGen/RISCV/rvv/fptosi-sat.ll
  llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
  llvm/test/CodeGen/RISCV/rvv/inline-asm.ll
  llvm/test/CodeGen/RISCV/rvv/memory-args.ll
  llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
  llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/pr63596.ll
  llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/round-vp.ll
  llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
  llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
  llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
  llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll
  llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll
  llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
  llvm/test/CodeGen/RISCV/rvv/select-fp.ll
  llvm/test/CodeGen/RISCV/rvv/select-int.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
  llvm/test/CodeGen/RISCV/rvv/shuffle-reverse.ll
  llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/stepvector.ll
  llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
  llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
  llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
  llvm/test/CodeGen/RISCV/rvv/vaadd.ll
  llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
  llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vadd.ll
  llvm/test/CodeGen/RISCV/rvv/vand.ll
  llvm/test/CodeGen/RISCV/rvv/vandn.ll
  llvm/test/CodeGen/RISCV/rvv/vasub.ll
  llvm/test/CodeGen/RISCV/rvv/vasubu.ll
  llvm/test/CodeGen/RISCV/rvv/vclmul.ll
  llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
  llvm/test/CodeGen/RISCV/rvv/vdiv.ll
  llvm/test/CodeGen/RISCV/rvv/vdivu.ll
  llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
  llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
  llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
  llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
  llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
  llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfadd.ll
  llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv.ll
  llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfmacc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmax.ll
  llvm/test/CodeGen/RISCV/rvv/vfmin.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsac-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul.ll
  llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfneg-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmacc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsac-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfptosi-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfptoui-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll
  llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll
  llvm/test/CodeGen/RISCV/rvv/vfsqrt-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub.ll
  llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll
  llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
  llvm/test/CodeGen/RISCV/rvv/vghsh.ll
  llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
  llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
  llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in.ll
  llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmax.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmaxu.ll
  llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vmin.ll
  llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vminu.ll
  llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in.ll
  llvm/test/CodeGen/RISCV/rvv/vmul.ll
  llvm/test/CodeGen/RISCV/rvv/vmulh.ll
  llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll
  llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
  llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vor.ll
  llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vpload.ll
  llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vpstore.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vrem.ll
  llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vremu.ll
  llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vrol.ll
  llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/vror.ll
  llvm/test/CodeGen/RISCV/rvv/vrsub.ll
  llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
  llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
  llvm/test/CodeGen/RISCV/rvv/vsext-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vsha2ch.ll
  llvm/test/CodeGen/RISCV/rvv/vsha2cl.ll
  llvm/test/CodeGen/RISCV/rvv/vsha2ms.ll
  llvm/test/CodeGen/RISCV/rvv/vsitofp-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsll.ll
  llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsra.ll
  llvm/test/CodeGen/RISCV/rvv/vsrl.ll
  llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vsub.ll
  llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
  llvm/test/CodeGen/RISCV/rvv/vuitofp-vp.ll
  (8 more files...)

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