[PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR

[Brandon Wu via Phabricator via llvm-commits]

4vtomat added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:7135
+static inline bool isValidEGW(int EGS, EVT VT) {
+  return VT.getSizeInBits().getKnownMinValue() >= EGS * VT.getScalarSizeInBits();
+}
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craig.topper wrote:
> Doesn't this need to consider the value of vscale or VLEN? getKnownMinValue() always returns 64 for <vscale x 2 x i32>.
My thought was: For each `<vscale x N x M>`, if `N * M >= EGS * M == [4|8] * M`, namely if `N >= EGS`, then it's valid.
So, for vaesdf.vv vd, vs1, vs2, <vscale x 2 x i32> is invalid, however, <vscale x 4 x i32> and larger is valid.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D138809/new/

https://reviews.llvm.org/D138809