[PATCH] D153848: [RISCV] Apply promotion for f16 vector ops when only have zvfhmin.
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 2 01:18:59 PDT 2023
jacquesguan marked 6 inline comments as done.
jacquesguan added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:12869
+ return V;
+ // Don't combine to fp16 for zvfhmin.
+ if (N->getValueType(0).isScalableVector() &&
----------------
craig.topper wrote:
> Can this be moved into performVFMADD_VLCombine?
This change is done in parent revision https://reviews.llvm.org/D151414.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153848/new/
https://reviews.llvm.org/D153848
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