[PATCH] D156855: [X86] Special handle for v1i1 during ExtractBitFromMaskVector

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:20563
+    return DAG.getNode(ISD::TRUNCATE, dl, EltVT, DAG.getBitcast(MVT::i16, Vec));
+  }
 
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Why not put this inside the (!IdxC) if-block above?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D156855/new/

https://reviews.llvm.org/D156855