[PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode

[Momchil Velikov via Phabricator via llvm-commits]

chill updated this revision to Diff 547261.
chill added a comment.

Update:

- added folding of 32-bit zero-/sign-extends into load/store addressing mode
- removed an arbitrary restriction of not folding instructions in the same basic block
- implemented a slightly more efficient cleanup of dead COPYs
- removed references to nonexistent virtual registers from  debug instructions


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152828/new/

https://reviews.llvm.org/D152828

Files:
  llvm/test/CodeGen/AArch64/arm64-stp.ll
  llvm/test/CodeGen/AArch64/sink-and-fold.ll
  llvm/test/CodeGen/AArch64/swift-async-win.ll

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