[PATCH] D156968: [ARM] v6-M XO: save CPSR around LoadStackGuard

[Simon Wallis via Phabricator via llvm-commits]

simonwallis2 created this revision.
simonwallis2 added reviewers: stuij, john.brawn, olista01, keith.walker.arm.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
simonwallis2 requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

For Thumb-1 Execute-Only, expandLoadStackGuardBase generates a tMOVimm32 pseudo when calculating the stack offset.
It does this in a context where the CSPR maybe be live. tMOVimm32 may corrupt CPSR.
To fix this, generate save/restore CPSR around the tMOVimm32 using MRS/MSR to/from a scratch register.

expandLoadStackGuardBase this runs after register allocation, so the scratch register needs to be a physical register. 
Use R12 <https://reviews.llvm.org/source/lldb/> as a scratch register, as is usual when expanding a pseudo.
MSR/MRS are some of the few v6-M instructions which operate on a high register.

New stack-guard test case added which was generating incorrect code without the save/restore CPSR.


https://reviews.llvm.org/D156968

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/test/CodeGen/Thumb/stack-guard-xo-sub64.ll
  llvm/test/CodeGen/Thumb/stack-guard-xo.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D156968.546724.patch
Type: text/x-patch
Size: 6324 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230803/30c4b589/attachment.bin>