[PATCH] D156785: [AArch64][PAC] Skip checking LR during tail call if FPAC is enabled

[Anatoly Trosinenko via Phabricator via llvm-commits]

atrosinenko created this revision.
atrosinenko added reviewers: ab, kristof.beyls, apazos, pcc, psmith, t.p.northover.
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If the target CPU implements optional FPAC feature, AUT* instruction
will fault by itself if pointer authentication fails, so skip the
explicit check.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156785

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll


Index: llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
===================================================================
--- llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
+++ llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
@@ -1,13 +1,19 @@
 ; RUN: llc -mtriple=aarch64 -asm-verbose=0              < %s | FileCheck -DAUT="hint #29" --check-prefixes=COMMON,LDR %s
 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -mattr=v8.3a < %s | FileCheck -DAUT="autiasp"  --check-prefixes=COMMON,LDR %s
+; RUN: llc -mtriple=aarch64 -asm-verbose=0 -mattr=v8.3a,fpac < %s | FileCheck -DAUT="autiasp" --check-prefixes=COMMON,FPAC %s
 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-check-authenticated-lr-by-load=0              < %s | FileCheck -DAUT="hint #29" -DXPAC="hint #7" --check-prefixes=COMMON,XPAC %s
 ; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-check-authenticated-lr-by-load=0 -mattr=v8.3a < %s | FileCheck -DAUT="autiasp"  -DXPAC="xpaclri" --check-prefixes=COMMON,XPAC %s
+; RUN: llc -mtriple=aarch64 -asm-verbose=0 -aarch64-check-authenticated-lr-by-load=0 -mattr=v8.3a,fpac < %s | FileCheck -DAUT="autiasp" --check-prefixes=COMMON,FPAC %s
 
 define i32 @tailcall_direct() "sign-return-address"="non-leaf" {
 ; COMMON-LABEL: tailcall_direct:
 ; COMMON:         str x30, [sp, #-16]!
 ; COMMON:         ldr x30, [sp], #16
 ;
+; FPAC-NEXT:      [[AUT]]
+; FPAC-NEXT:      .cfi_negate_ra_state
+; FPAC-NEXT:      b callee
+;
 ; LDR-NEXT:       [[AUT]]
 ; LDR-NEXT:       .cfi_negate_ra_state
 ; LDR-NEXT:       ldr x16, [x30]
@@ -32,6 +38,10 @@
 ; COMMON:         str x30, [sp, #-16]!
 ; COMMON:         ldr x30, [sp], #16
 ;
+; FPAC-NEXT:      [[AUT]]
+; FPAC-NEXT:      .cfi_negate_ra_state
+; FPAC-NEXT:      br x0
+;
 ; LDR-NEXT:       [[AUT]]
 ; LDR-NEXT:       .cfi_negate_ra_state
 ; LDR-NEXT:       ldr x16, [x30]
@@ -72,6 +82,10 @@
 ; COMMON-NOT:     str{{.*}}x30
 ; COMMON-NOT:     ldr{{.*}}x30
 ;
+; FPAC:           [[AUT]]
+; FPAC-NEXT:      .cfi_negate_ra_state
+; FPAC-NEXT:      b callee
+;
 ; LDR:            [[AUT]]
 ; LDR-NEXT:       .cfi_negate_ra_state
 ; LDR-NEXT:       ldr x16, [x30]
@@ -95,6 +109,10 @@
 ; COMMON-NOT:     str{{.*}}x30
 ; COMMON-NOT:     ldr{{.*}}x30
 ;
+; FPAC:           [[AUT]]
+; FPAC-NEXT:      .cfi_negate_ra_state
+; FPAC-NEXT:      br x0
+;
 ; LDR:            [[AUT]]
 ; LDR-NEXT:       .cfi_negate_ra_state
 ; LDR-NEXT:       ldr x16, [x30]
Index: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1960,6 +1960,9 @@
   if (!MFnI.shouldSignReturnAddress(MF))
     return MBB;
 
+  if (MF.getSubtarget<AArch64Subtarget>().hasFPAC())
+    return MBB;
+
   auto TI = MBB.getFirstTerminator();
   if (TI == MBB.end())
     return MBB;


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