[PATCH] D157094: [CodeGen] Pre-commit tests showing incorrect pattern FMLA_* pseudo instructions

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 4 09:39:45 PDT 2023


paulwalker-arm added inline comments.


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Comment at: llvm/test/CodeGen/AArch64/sve-fp-combine.ll:1271
+
+; Make sure to select the correct destination operand and avoid choosing z0 mindlessly.
+define <vscale x 8 x half> @fadd_sel_fmul_h_different_arg_order(<vscale x 8 x i1> %pred, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
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I'd remove this comment but let's certainly drop the `mindlessly` part.


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Comment at: llvm/test/CodeGen/AArch64/sve-fp-combine.ll:1277-1279
+  %mul = fmul contract <vscale x 8 x half> %m1, %m2
+  %masked.mul = select <vscale x 8 x i1> %pred, <vscale x 8 x half> %mul, <vscale x 8 x half> zeroinitializer
+  %add = fadd nsz contract <vscale x 8 x half> %acc, %masked.mul
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This doesn't match the patterns you're moving in the follow on work.  Is it possible to use `llvm.fma` and `select` as they appear in the PatFrags?  You don't need to worry about `FMA_PRED` because that will be created automatically when `ISD::FMA` is lowered.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157094/new/

https://reviews.llvm.org/D157094



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