[PATCH] D156538: [AArch64] Try to combine FMUL with FDIV
JinGu Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 1 10:37:22 PDT 2023
jaykang10 added a comment.
> Does it make sense to keep them selection fdiv, or should they always just match fmul? It would seem we only need one, and fmul is more canonical.
Additionally, `multiclass FPToIntegerScaled` and `multiclass IntegerToFP` share the `SelectCVTFixedPosOperand` as below.
class fixedpoint_i32<ValueType FloatVT>
: Operand<FloatVT>,
ComplexPattern<FloatVT, 1, "SelectCVTFixedPosOperand<32>", [fpimm, ld]> {
let EncoderMethod = "getFixedPointScaleOpValue";
let DecoderMethod = "DecodeFixedPointScaleImm32";
let ParserMatchClass = Imm1_32Operand;
}
...
def fixedpoint_f32_i64 : fixedpoint_i64<f32>;
...
multiclass FPToIntegerScaled<bits<2> rmode, bits<3> opcode, string asm,
SDPatternOperator OpN> {
...
def SXSri : BaseFPToInteger<0b00, rmode, opcode, FPR32, GPR64,
fixedpoint_f32_i64, asm,
[(set GPR64:$Rd, (OpN (fmul FPR32:$Rn,
fixedpoint_f32_i64:$scale)))]> {
let Inst{31} = 1; // 64-bit GPR flag
}
...
multiclass IntegerToFP<bit isUnsigned, string asm, SDPatternOperator node> {
...
def SXSri: BaseIntegerToFP<isUnsigned, GPR64, FPR32, fixedpoint_f32_i64, asm,
[(set FPR32:$Rd,
(fdiv (node GPR64:$Rn),
fixedpoint_f32_i64:$scale))]> {
let Inst{31} = 1; // 64-bit GPR flag
let Inst{23-22} = 0b00; // 32-bit FPR flag
}
The `SelectCVTFixedPosOperand` is for `fcvt` and checks the constant is `2^fbits`.
If we keep the `fdiv` for `scvtf`, we can use `SelectCVTFixedPosOperand`.
If we replace the `fdiv` with `fmul` for `scvtf`, we need other complex pattern which checks the constant `1/2^fbits`.
GCC uses `fmul` for `fcvt` and `scvft` but it has two patterns for `2^n` and `1/2^n`.
>From my personal opinion, as current implementation, it would also be good to keep one complex pattern with `fmul` and `fdiv`.
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https://reviews.llvm.org/D156538/new/
https://reviews.llvm.org/D156538
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