[PATCH] D156799: Update generic scheduling to use A510 scheduling model

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 2 02:38:00 PDT 2023


dmgreen added reviewers: SjoerdMeijer, samtebbs, t.p.northover, tmatheson.
dmgreen added a comment.

Sounds great. The change certainly sounds like a good idea.

There are a lot of test updates needed though, and some of them might be better not-auto-generated, or could otherwise do with a bit of a cleanup. I remember when changing to the A55 scheduling model that I just manually updated some of the tests, it might be better to do the same here. I haven't gone through everything, but have marked some of the tests that could do with some cleanup.



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Comment at: llvm/test/CodeGen/AArch64/128bit_load_store.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=neon | FileCheck %s
----------------
I'm not sure why this needed updating, but the check lines OK here.


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Comment at: llvm/test/CodeGen/AArch64/2s-complement-asm.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc -mtriple=arm64-apple-ios %s -filetype=obj -o - | llvm-objdump --macho --section __DATA,__data - | FileCheck %s
----------------
This one isn't needed, and seems to not have updated the actual tests.


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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc -verify-machineinstrs -frame-pointer=all -global-isel < %s -mtriple=aarch64-apple-ios | FileCheck %s
----------------
I think this is one that is best left manually updated.


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Comment at: llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll:1
-; RUN: llc < %s -O2 -mtriple=aarch64-none-linux-gnu 
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -O2 -mtriple=aarch64-none-linux-gnu
----------------
Probably not needed.


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Comment at: llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll:2277
 ; CHECK-NEXT:    bl __fixunssfti
+; CHECK-NEXT:    ldr x9, [sp] // 8-byte Folded Reload
+; CHECK-NEXT:    extr x8, x20, x21, #28
----------------
There is an extra spill here, but that kind of things is expected given enough code.


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Comment at: llvm/test/CodeGen/AArch64/logical_shifted_reg.ll:261
 ; CHECK-NEXT:    and x10, x9, x10, asr #12
-; CHECK-NEXT:    ccmp x10, #1, #0, ge
-; CHECK-NEXT:    b.lt .LBB2_3
-; CHECK-NEXT:  .LBB2_2: // %common.ret
-; CHECK-NEXT:    ret
-; CHECK-NEXT:  .LBB2_3: // %other_exit
+; CHECK-NEXT:    cmp x10, #1
+; CHECK-NEXT:    b.ge .LBB2_4
----------------
This looks like it no longer decides to ifcvt. Given the test that sound fine I think.


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Comment at: llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll:137-138
 !4 = !{!3}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; MIR: {{.*}}
----------------
Things like this can be removed too, so long as there are check lines elsewhere.


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Comment at: llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir:1
+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 # RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon  %s -o - 2>&1 \
----------------
This doesn't look right. Should it be using -mcpu=cortex-a55 instead?


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Comment at: llvm/test/CodeGen/AArch64/misched-fusion-lit.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc %s -o - -mtriple=aarch64-unknown -mattr=-fuse-adrp-add,-fuse-literals | FileCheck %s --check-prefix=CHECK --check-prefix=CHECKDONT
----------------
This is likely best checked manually.


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Comment at: llvm/test/CodeGen/AArch64/named-vector-shuffles-neon.ll:114
+; CHECK-NEXT:    ext v3.16b, v4.16b, v5.16b, #12
+; CHECK-NEXT:    mov v2.16b, v6.16b
 ; CHECK-NEXT:    ret
----------------
Some of these have less movs thanks to the lower latencies, which is nice.


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Comment at: llvm/test/CodeGen/AArch64/wineh-bti.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc < %s -mtriple=aarch64-windows | FileCheck %s
----------------
This has test CHECK line elsewhere in the file. 


Repository:
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  https://reviews.llvm.org/D156799/new/

https://reviews.llvm.org/D156799



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