[llvm] fe4c99d - [RISCV] Add test case showing CSE regression from issue 64282

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2023-08-02T09:12:46-07:00
New Revision: fe4c99d1d6232f45ab481273ec76b46712a712cf

URL: https://github.com/llvm/llvm-project/commit/fe4c99d1d6232f45ab481273ec76b46712a712cf
DIFF: https://github.com/llvm/llvm-project/commit/fe4c99d1d6232f45ab481273ec76b46712a712cf.diff

LOG: [RISCV] Add test case showing CSE regression from issue 64282

Added: 
    llvm/test/CodeGen/RISCV/rvv/cross-block-cse.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/RISCV/rvv/cross-block-cse.ll b/llvm/test/CodeGen/RISCV/rvv/cross-block-cse.ll
new file mode 100644
index 00000000000000..8e4618d34ad2c9
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/cross-block-cse.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -O3 -mtriple=riscv64 -mattr=+v | FileCheck %s
+
+; TODO: The case below demonstrates a regression in cross block CSE of vector
+; instructions with undefined passthru operands.  The second vadd.vv should be
+; removed.
+define void @foo(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y, ptr %p1, ptr %p2, i1 zeroext %cond) {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetvli a3, zero, e32, m1, ta, ma
+; CHECK-NEXT:    vadd.vv v10, v8, v9
+; CHECK-NEXT:    vs1r.v v10, (a0)
+; CHECK-NEXT:    bnez a2, .LBB0_2
+; CHECK-NEXT:  # %bb.1: # %falsebb
+; CHECK-NEXT:    vadd.vv v8, v8, v9
+; CHECK-NEXT:    vs1r.v v8, (a1)
+; CHECK-NEXT:  .LBB0_2: # %mergebb
+; CHECK-NEXT:    ret
+  %a = add <vscale x 2 x i32> %x, %y
+  store <vscale x 2 x i32> %a, ptr %p1
+  br i1 %cond, label %mergebb, label %falsebb
+
+falsebb:
+  %b = add <vscale x 2 x i32> %x, %y
+  store <vscale x 2 x i32> %b, ptr %p2
+  br label %mergebb
+
+mergebb:
+  ret void
+}